Commit 9c381801 authored by Philippe Gerum's avatar Philippe Gerum

gpu: ipu-v3: ipipe: enable interrupt pipelining

Fix up the IPU (GPU) driver in order to channel interrupts through the
interrupt pipeline.
parent 068269a4
......@@ -1084,7 +1084,7 @@ static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs)
irq = irq_linear_revmap(ipu->domain,
regs[i] * 32 + bit);
if (irq)
generic_handle_irq(irq);
ipipe_handle_demuxed_irq(irq);
}
}
}
......@@ -1308,6 +1308,7 @@ static int ipu_irq_init(struct ipu_soc *ipu)
ct->chip.irq_ack = irq_gc_ack_set_bit;
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.flags = IRQCHIP_PIPELINE_SAFE;
ct->regs.ack = IPU_INT_STAT(i / 32);
ct->regs.mask = IPU_INT_CTRL(i / 32);
}
......
......@@ -179,7 +179,7 @@ struct ipu_soc {
struct device *dev;
const struct ipu_devtype *devtype;
enum ipuv3_type ipu_type;
spinlock_t lock;
ipipe_spinlock_t lock;
struct mutex channel_lock;
struct list_head channels;
......
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