Commit 1a765f19 authored by Gilles Chanteperdrix's avatar Gilles Chanteperdrix Committed by Philippe Gerum

irqchip: crossbar: ipipe: enable interrupt pipelining

Fix up TI's crossbar interrupt controller driver in order to channel
interrupts through the interrupt pipeline.
parent a2534ca8
......@@ -16,6 +16,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/slab.h>
#include <linux/ipipe.h>
#define IRQ_FREE -1
#define IRQ_RESERVED -2
......@@ -69,10 +70,15 @@ static struct irq_chip crossbar_chip = {
.irq_retrigger = irq_chip_retrigger_hierarchy,
.irq_set_type = irq_chip_set_type_parent,
.flags = IRQCHIP_MASK_ON_SUSPEND |
IRQCHIP_SKIP_SET_WAKE,
IRQCHIP_SKIP_SET_WAKE |
IRQCHIP_PIPELINE_SAFE,
#ifdef CONFIG_SMP
.irq_set_affinity = irq_chip_set_affinity_parent,
#endif
#ifdef CONFIG_IPIPE
.irq_hold = irq_chip_hold_parent,
.irq_release = irq_chip_release_parent,
#endif
};
static int allocate_gic_irq(struct irq_domain *domain, unsigned virq,
......
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