• Denys Vlasenko's avatar
    x86/asm: Optimize unnecessarily wide TEST instructions · 3e1aa7cb
    Denys Vlasenko authored
    By the nature of the TEST operation, it is often possible to test
    a narrower part of the operand:
    
        "testl $3,  mem"  ->  "testb $3, mem",
        "testq $3, %rcx"  ->  "testb $3, %cl"
    
    This results in shorter instructions, because the TEST instruction
    has no sign-entending byte-immediate forms unlike other ALU ops.
    
    Note that this change does not create any LCP (Length-Changing Prefix)
    stalls, which happen when adding a 0x66 prefix, which happens when
    16-bit immediates are used, which changes such TEST instructions:
    
      [test_opcode] [modrm] [imm32]
    
    to:
    
      [0x66] [test_opcode] [modrm] [imm16]
    
    where [imm16] has a *different length* now: 2 bytes instead of 4.
    This confuses the decoder and slows down execution.
    
    REX prefixes were carefully designed to almost never hit this case:
    adding REX prefix does not change instruction length except MOVABS
    and MOV [addr],RAX instruction.
    
    This patch does not add instructions which would use a 0x66 prefix,
    code changes in assembly are:
    
        -48 f7 07 01 00 00 00 	testq  $0x1,(%rdi)
        +f6 07 01             	testb  $0x1,(%rdi)
        -48 f7 c1 01 00 00 00 	test   $0x1,%rcx
        +f6 c1 01             	test   $0x1,%cl
        -48 f7 c1 02 00 00 00 	test   $0x2,%rcx
        +f6 c1 02             	test   $0x2,%cl
        -41 f7 c2 01 00 00 00 	test   $0x1,%r10d
        +41 f6 c2 01          	test   $0x1,%r10b
        -48 f7 c1 04 00 00 00 	test   $0x4,%rcx
        +f6 c1 04             	test   $0x4,%cl
        -48 f7 c1 08 00 00 00 	test   $0x8,%rcx
        +f6 c1 08             	test   $0x8,%cl
    
    Linus further notes:
    
       "There are no stalls from using 8-bit instruction forms.
    
        Now, changing from 64-bit or 32-bit 'test' instructions to 8-bit ones
        *could* cause problems if it ends up having forwarding issues, so that
        instead of just forwarding the result, you end up having to wait for
        it to be stable in the L1 cache (or possibly the register file). The
        forwarding from the store buffer is simplest and most reliable if the
        read is done at the exact same address and the exact same size as the
        write that gets forwarded.
    
        But that's true only if:
    
         (a) the write was very recent and is still in the write queue. I'm
             not sure that's the case here anyway.
    
         (b) on at least most Intel microarchitectures, you have to test a
             different byte than the lowest one (so forwarding a 64-bit write
             to a 8-bit read ends up working fine, as long as the 8-bit read
             is of the low 8 bits of the written data).
    
        A very similar issue *might* show up for registers too, not just
        memory writes, if you use 'testb' with a high-byte register (where
        instead of forwarding the value from the original producer it needs to
        go through the register file and then shifted). But it's mainly a
        problem for store buffers.
    
        But afaik, the way Denys changed the test instructions, neither of the
        above issues should be true.
    
        The real problem for store buffer forwarding tends to be "write 8
        bits, read 32 bits". That can be really surprisingly expensive,
        because the read ends up having to wait until the write has hit the
        cacheline, and we might talk tens of cycles of latency here. But
        "write 32 bits, read the low 8 bits" *should* be fast on pretty much
        all x86 chips, afaik."
    Signed-off-by: 's avatarDenys Vlasenko <dvlasenk@redhat.com>
    Acked-by: 's avatarAndy Lutomirski <luto@amacapital.net>
    Acked-by: 's avatarLinus Torvalds <torvalds@linux-foundation.org>
    Cc: Borislav Petkov <bp@alien8.de>
    Cc: Frederic Weisbecker <fweisbec@gmail.com>
    Cc: H. Peter Anvin <hpa@linux.intel.com>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Kees Cook <keescook@chromium.org>
    Cc: Oleg Nesterov <oleg@redhat.com>
    Cc: Steven Rostedt <rostedt@goodmis.org>
    Cc: Will Drewry <wad@chromium.org>
    Link: http://lkml.kernel.org/r/1425675332-31576-1-git-send-email-dvlasenk@redhat.comSigned-off-by: 's avatarIngo Molnar <mingo@kernel.org>
    3e1aa7cb