Commit a8ba07eb authored by Philippe Gerum's avatar Philippe Gerum Committed by Dmitriy Cherkasov

irqchip: bcm2836: ipipe: enable pipelined interrupts

parent 201d62bf
......@@ -101,40 +101,68 @@ static void bcm2836_arm_irqchip_unmask_per_cpu_irq(unsigned int reg_offset,
writel(readl(reg) | BIT(bit), reg);
}
static void bcm2836_arm_irqchip_mask_timer_irq(struct irq_data *d)
static void __bcm2836_arm_irqchip_mask_timer_irq(struct irq_data *d)
{
bcm2836_arm_irqchip_mask_per_cpu_irq(LOCAL_TIMER_INT_CONTROL0,
d->hwirq - LOCAL_IRQ_CNTPSIRQ,
smp_processor_id());
raw_smp_processor_id());
}
static void bcm2836_arm_irqchip_unmask_timer_irq(struct irq_data *d)
static void bcm2836_arm_irqchip_mask_timer_irq(struct irq_data *d)
{
unsigned long flags;
flags = hard_local_irq_save();
__bcm2836_arm_irqchip_mask_timer_irq(d);
hard_local_irq_restore(flags);
}
static void __bcm2836_arm_irqchip_unmask_timer_irq(struct irq_data *d)
{
bcm2836_arm_irqchip_unmask_per_cpu_irq(LOCAL_TIMER_INT_CONTROL0,
d->hwirq - LOCAL_IRQ_CNTPSIRQ,
smp_processor_id());
raw_smp_processor_id());
}
static void bcm2836_arm_irqchip_unmask_timer_irq(struct irq_data *d)
{
unsigned long flags;
flags = hard_local_irq_save();
__bcm2836_arm_irqchip_unmask_timer_irq(d);
hard_local_irq_restore(flags);
}
static struct irq_chip bcm2836_arm_irqchip_timer = {
.name = "bcm2836-timer",
.irq_mask = bcm2836_arm_irqchip_mask_timer_irq,
.irq_unmask = bcm2836_arm_irqchip_unmask_timer_irq,
#ifdef CONFIG_IPIPE
.irq_hold = __bcm2836_arm_irqchip_mask_timer_irq,
.irq_release = __bcm2836_arm_irqchip_unmask_timer_irq,
#endif
.flags = IRQCHIP_PIPELINE_SAFE,
};
static void bcm2836_arm_irqchip_mask_pmu_irq(struct irq_data *d)
{
writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR);
writel(1 << raw_smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR);
}
static void bcm2836_arm_irqchip_unmask_pmu_irq(struct irq_data *d)
{
writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET);
writel(1 << raw_smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET);
}
static struct irq_chip bcm2836_arm_irqchip_pmu = {
.name = "bcm2836-pmu",
.irq_mask = bcm2836_arm_irqchip_mask_pmu_irq,
.irq_unmask = bcm2836_arm_irqchip_unmask_pmu_irq,
#ifdef CONFIG_IPIPE
.irq_hold = bcm2836_arm_irqchip_mask_pmu_irq,
.irq_release = bcm2836_arm_irqchip_unmask_pmu_irq,
#endif
.flags = IRQCHIP_PIPELINE_SAFE,
};
static void bcm2836_arm_irqchip_mask_gpu_irq(struct irq_data *d)
......@@ -149,6 +177,11 @@ static struct irq_chip bcm2836_arm_irqchip_gpu = {
.name = "bcm2836-gpu",
.irq_mask = bcm2836_arm_irqchip_mask_gpu_irq,
.irq_unmask = bcm2836_arm_irqchip_unmask_gpu_irq,
#ifdef CONFIG_IPIPE
.irq_hold = bcm2836_arm_irqchip_mask_gpu_irq,
.irq_release = bcm2836_arm_irqchip_unmask_gpu_irq,
#endif
.flags = IRQCHIP_PIPELINE_SAFE,
};
static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip)
......@@ -163,7 +196,7 @@ static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip)
static void
__exception_irq_entry bcm2836_arm_irqchip_handle_irq(struct pt_regs *regs)
{
int cpu = smp_processor_id();
int cpu = raw_smp_processor_id();
u32 stat;
stat = readl_relaxed(intc.base + LOCAL_IRQ_PENDING0 + 4 * cpu);
......@@ -175,12 +208,12 @@ __exception_irq_entry bcm2836_arm_irqchip_handle_irq(struct pt_regs *regs)
u32 ipi = ffs(mbox_val) - 1;
writel(1 << ipi, mailbox0);
handle_IPI(ipi, regs);
ipipe_handle_multi_ipi(ipi, regs);
#endif
} else if (stat) {
u32 hwirq = ffs(stat) - 1;
handle_domain_irq(intc.domain, hwirq, regs);
ipipe_handle_domain_irq(intc.domain, hwirq, regs);
}
}
......
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