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    RISC-V: Allow userspace to flush the instruction cache · 921ebd8f
    Andrew Waterman authored
    
    
    Despite RISC-V having a direct 'fence.i' instruction available to
    userspace (which we can't trap!), that's not actually viable when
    running on Linux because the kernel might schedule a process on another
    hart.  There is no way for userspace to handle this without invoking the
    kernel (as it doesn't know the thread->hart mappings), so we've defined
    a RISC-V specific system call to flush the instruction cache.
    
    This patch adds both a system call and a VDSO entry.  If possible, we'd
    like to avoid having the system call be considered part of the
    user-facing ABI and instead restrict that to the VDSO entry -- both just
    in general to avoid having additional user-visible ABI to maintain, and
    because we'd prefer that users just call the VDSO entry because there
    might be a better way to do this in the future (ie, one that doesn't
    require entering the kernel).
    
    Signed-off-by: default avatarAndrew Waterman <andrew@sifive.com>
    Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
    921ebd8f