Commit 9347ce54 authored by Palmer Dabbelt's avatar Palmer Dabbelt

RISC-V: __test_and_op_bit_ord should be strongly ordered

I mis-read the documentation.  After looking at it again the
documentation is actually as clear as it can be, it's just that I didn't
actually read it in order and therefor did the wrong thing.
Signed-off-by: default avatarPalmer Dabbelt <>
parent 3343eb68
......@@ -67,7 +67,7 @@
: "memory");
#define __test_and_op_bit(op, mod, nr, addr) \
__test_and_op_bit_ord(op, mod, nr, addr, )
__test_and_op_bit_ord(op, mod, nr, addr, .aqrl)
#define __op_bit(op, mod, nr, addr) \
__op_bit_ord(op, mod, nr, addr, )
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