Commit b5c91666 authored by Dave Jones's avatar Dave Jones

[CPUFREQ] checkpatch cleanups for cpufreq-nforce2

Signed-off-by: default avatarDave Jones <davej@redhat.com>
parent fff78ad5
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
* nforce2_chipset: * nforce2_chipset:
* FSB is changed using the chipset * FSB is changed using the chipset
*/ */
static struct pci_dev *nforce2_chipset_dev; static struct pci_dev *nforce2_dev;
/* fid: /* fid:
* multiplier * 10 * multiplier * 10
...@@ -56,7 +56,8 @@ MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)"); ...@@ -56,7 +56,8 @@ MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
MODULE_PARM_DESC(min_fsb, MODULE_PARM_DESC(min_fsb,
"Minimum FSB to use, if not defined: current FSB - 50"); "Minimum FSB to use, if not defined: current FSB - 50");
#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg) #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
"cpufreq-nforce2", msg)
/** /**
* nforce2_calc_fsb - calculate FSB * nforce2_calc_fsb - calculate FSB
...@@ -118,11 +119,11 @@ static void nforce2_write_pll(int pll) ...@@ -118,11 +119,11 @@ static void nforce2_write_pll(int pll)
int temp; int temp;
/* Set the pll addr. to 0x00 */ /* Set the pll addr. to 0x00 */
pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, 0); pci_write_config_dword(nforce2_dev, NFORCE2_PLLADR, 0);
/* Now write the value in all 64 registers */ /* Now write the value in all 64 registers */
for (temp = 0; temp <= 0x3f; temp++) for (temp = 0; temp <= 0x3f; temp++)
pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll); pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll);
return; return;
} }
...@@ -139,8 +140,8 @@ static unsigned int nforce2_fsb_read(int bootfsb) ...@@ -139,8 +140,8 @@ static unsigned int nforce2_fsb_read(int bootfsb)
u32 fsb, temp = 0; u32 fsb, temp = 0;
/* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 0x01EF,
0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL); PCI_ANY_ID, PCI_ANY_ID, NULL);
if (!nforce2_sub5) if (!nforce2_sub5)
return 0; return 0;
...@@ -148,13 +149,13 @@ static unsigned int nforce2_fsb_read(int bootfsb) ...@@ -148,13 +149,13 @@ static unsigned int nforce2_fsb_read(int bootfsb)
fsb /= 1000000; fsb /= 1000000;
/* Check if PLL register is already set */ /* Check if PLL register is already set */
pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
if (bootfsb || !temp) if (bootfsb || !temp)
return fsb; return fsb;
/* Use PLL register FSB value */ /* Use PLL register FSB value */
pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp); pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp);
fsb = nforce2_calc_fsb(temp); fsb = nforce2_calc_fsb(temp);
return fsb; return fsb;
...@@ -185,7 +186,7 @@ static int nforce2_set_fsb(unsigned int fsb) ...@@ -185,7 +186,7 @@ static int nforce2_set_fsb(unsigned int fsb)
} }
/* First write? Then set actual value */ /* First write? Then set actual value */
pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
if (!temp) { if (!temp) {
pll = nforce2_calc_pll(tfsb); pll = nforce2_calc_pll(tfsb);
...@@ -197,7 +198,7 @@ static int nforce2_set_fsb(unsigned int fsb) ...@@ -197,7 +198,7 @@ static int nforce2_set_fsb(unsigned int fsb)
/* Enable write access */ /* Enable write access */
temp = 0x01; temp = 0x01;
pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8)temp); pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp);
diff = tfsb - fsb; diff = tfsb - fsb;
...@@ -222,7 +223,7 @@ static int nforce2_set_fsb(unsigned int fsb) ...@@ -222,7 +223,7 @@ static int nforce2_set_fsb(unsigned int fsb)
} }
temp = 0x40; temp = 0x40;
pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLADR, (u8)temp); pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp);
return 0; return 0;
} }
...@@ -244,7 +245,8 @@ static unsigned int nforce2_get(unsigned int cpu) ...@@ -244,7 +245,8 @@ static unsigned int nforce2_get(unsigned int cpu)
* nforce2_target - set a new CPUFreq policy * nforce2_target - set a new CPUFreq policy
* @policy: new policy * @policy: new policy
* @target_freq: the target frequency * @target_freq: the target frequency
* @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) * @relation: how that frequency relates to achieved frequency
* (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
* *
* Sets a new CPUFreq policy. * Sets a new CPUFreq policy.
*/ */
...@@ -328,7 +330,8 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy) ...@@ -328,7 +330,8 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
if (!fid) { if (!fid) {
if (!cpu_khz) { if (!cpu_khz) {
printk(KERN_WARNING printk(KERN_WARNING
"cpufreq: cpu_khz not set, can't calculate multiplier!\n"); "cpufreq: cpu_khz not set, "
"can't calculate multiplier!\n");
return -ENODEV; return -ENODEV;
} }
...@@ -392,17 +395,18 @@ static struct cpufreq_driver nforce2_driver = { ...@@ -392,17 +395,18 @@ static struct cpufreq_driver nforce2_driver = {
*/ */
static unsigned int nforce2_detect_chipset(void) static unsigned int nforce2_detect_chipset(void)
{ {
nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, nforce2_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
PCI_DEVICE_ID_NVIDIA_NFORCE2, PCI_DEVICE_ID_NVIDIA_NFORCE2,
PCI_ANY_ID, PCI_ANY_ID, NULL); PCI_ANY_ID, PCI_ANY_ID, NULL);
if (nforce2_chipset_dev == NULL) if (nforce2_dev == NULL)
return -ENODEV; return -ENODEV;
printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n", printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
nforce2_chipset_dev->revision); nforce2_dev->revision);
printk(KERN_INFO printk(KERN_INFO
"cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n"); "cpufreq: FSB changing is maybe unstable and can lead to "
"crashes and data loss.\n");
return 0; return 0;
} }
......
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