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    drm/omap: fix TILER on OMAP5 · 7cb0d6c1
    Tomi Valkeinen authored
    
    
    On OMAP5 it is not possible to use TILER buffer with CPU when caching or
    write-combining is used. Doing so leads to errors from the memory
    manager.
    
    However, on OMAP4, write-combining works fine.
    
    This patch adds platform specific data for the TILER, and a function
    tiler_get_cpu_cache_flags() which can be used to get the caching mode to
    be used.
    
    Note that without write-combining the use of the TILER buffer with CPU
    is unusably slow. It's still good to have it operational for testing
    purposes.
    
    Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
    7cb0d6c1