• Lorenzo Pieralisi's avatar
    ACPI / PCI: fix GIC irq model default PCI IRQ polarity · 10b68700
    Lorenzo Pieralisi authored
    On ACPI ARM based systems the GIC interrupt controller
    and corresponding interrupt model permit only the high
    polarity for level interrupts.
    
    ACPI firmware describes PCI legacy IRQs through entries
    in the _PRT objects. Entries in the _PRT can be of two types:
    
    - Static: not configurable, trigger/polarity default to level-low,
      _PRT entry defines the global GSI interrupt number
    - Configurable: _PRT interrupt entry contains a reference to the
      corresponding PCI interrupt link device (that in turn provides the
      interrupt descriptor through its _CRS/_PRS methods)
    
    Configurable IRQ entries are not currently allowed by the ACPI
    specification on ARM since they can only be used for interrupt pins that
    are routable, as per ACPI specifications (version 6.1, 6.2.13):
    
    "[...] There are two ways that _PRT can be used. Typically, the
    interrupt input that a given PCI interrupt is on is configurable. For
    example, a given PCI interrupt might be configured for either IRQ 10 or
    11 on an 8259 interrupt controller. In this model, each interrupt is
    represented in the ACPI namespace as a PCI Interrupt Link Device. [...]"
    
    ARM platforms GIC configurations do not allow dynamic IRQ routing,
    since routing is statically laid out at synthesis time; therefore PCI
    interrupt links cannot be used for PCI legacy IRQ descriptions in the
    _PRT on ARM systems.
    
    On the other hand, current core ACPI code handling PCI legacy IRQs
    consider IRQ trigger/polarity for static _PRT entries as level-low.
    
    On ARM systems with a GIC interrupt controller and corresponding
    ACPI interrupt model this does not work in that GIC interrupt
    controller is only capable of handling level interrupts whose
    polarity is high (for PCI legacy IRQs - that are level-low by
    specification - this means that the legacy IRQs are inverted before
    reaching the interrupt controller pin), resulting in IRQ allocation
    failures such as:
    
    genirq: Setting trigger mode 8 for irq 18 failed (gic_set_type+0x0/0x48)
    
    Change the default polarity for PCI legacy IRQs to high on systems
    booting wth ACPI on platforms with a GIC interrupt controller model,
    fixing the discrepancy between specification and HW behaviour.
    Signed-off-by: 's avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: 's avatarMarc Zyngier <marc.zyngier@arm.com>
    Tested-by: 's avatarDuc Dang <dhdang@apm.com>
    Signed-off-by: 's avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
    10b68700