1. 30 Nov, 2017 1 commit
  2. 02 Jun, 2017 1 commit
  3. 19 Dec, 2016 1 commit
  4. 31 May, 2016 1 commit
    • Arnd Bergmann's avatar
      drm/omap: include linux/seq_file.h where needed · 2d802453
      Arnd Bergmann authored
      The omapdrm driver relies on this header to be included
      implicitly, but this does not always work, and I get
      this error in randconfig builds:
      
      gpu/drm/omapdrm/dss/hdmi_phy.c: In function 'hdmi_phy_dump':
      gpu/drm/omapdrm/dss/hdmi_phy.c:34:2: error: implicit declaration of function 'seq_printf' [-Werror=implicit-function-declaration]
      gpu/drm/omapdrm/dss/hdmi_wp.c: In function 'hdmi_wp_dump':
      gpu/drm/omapdrm/dss/hdmi_wp.c:26:2: error: implicit declaration of function 'seq_printf' [-Werror=implicit-function-declaration]
      gpu/drm/omapdrm/dss/hdmi_pll.c: In function 'hdmi_pll_dump':
      gpu/drm/omapdrm/dss/hdmi_pll.c:30:2: error: implicit declaration of function 'seq_printf' [-Werror=implicit-function-declaration]
      
      This adds the #include statements in all files that have
      a seq_printf statement.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      2d802453
  5. 09 Mar, 2016 1 commit
    • Luis R. Rodriguez's avatar
      dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc() · f6e45661
      Luis R. Rodriguez authored
      Rename dma_*_writecombine() to dma_*_wc(), so that the naming
      is coherent across the various write-combining APIs. Keep the
      old names for compatibility for a while, these can be removed
      at a later time. A guard is left to enable backporting of the
      rename, and later remove of the old mapping defines seemlessly.
      
      Build tested successfully with allmodconfig.
      
      The following Coccinelle SmPL patch was used for this simple
      transformation:
      
      @ rename_dma_alloc_writecombine @
      expression dev, size, dma_addr, gfp;
      @@
      
      -dma_alloc_writecombine(dev, size, dma_addr, gfp)
      +dma_alloc_wc(dev, size, dma_addr, gfp)
      
      @ rename_dma_free_writecombine @
      expression dev, size, cpu_addr, dma_addr;
      @@
      
      -dma_free_writecombine(dev, size, cpu_addr, dma_addr)
      +dma_free_wc(dev, size, cpu_addr, dma_addr)
      
      @ rename_dma_mmap_writecombine @
      expression dev, vma, cpu_addr, dma_addr, size;
      @@
      
      -dma_mmap_writecombine(dev, vma, cpu_addr, dma_addr, size)
      +dma_mmap_wc(dev, vma, cpu_addr, dma_addr, size)
      
      We also keep the old names as compatibility helpers, and
      guard against their definition to make backporting easier.
      
      Generated-by: Coccinelle SmPL
      Suggested-by: default avatarIngo Molnar <mingo@kernel.org>
      Signed-off-by: default avatarLuis R. Rodriguez <mcgrof@suse.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: airlied@linux.ie
      Cc: akpm@linux-foundation.org
      Cc: benh@kernel.crashing.org
      Cc: bhelgaas@google.com
      Cc: bp@suse.de
      Cc: dan.j.williams@intel.com
      Cc: daniel.vetter@ffwll.ch
      Cc: dhowells@redhat.com
      Cc: julia.lawall@lip6.fr
      Cc: konrad.wilk@oracle.com
      Cc: linux-fbdev@vger.kernel.org
      Cc: linux-pci@vger.kernel.org
      Cc: luto@amacapital.net
      Cc: mst@redhat.com
      Cc: tomi.valkeinen@ti.com
      Cc: toshi.kani@hp.com
      Cc: vinod.koul@intel.com
      Cc: xen-devel@lists.xensource.com
      Link: http://lkml.kernel.org/r/1453516462-4844-1-git-send-email-mcgrof@do-not-panic.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      f6e45661
  6. 03 Mar, 2016 2 commits
  7. 31 Dec, 2015 2 commits
  8. 02 Jul, 2015 1 commit
    • Tomi Valkeinen's avatar
      drm/omap: increase DMM transaction timeout · 96cbd142
      Tomi Valkeinen authored
      The DMM driver uses a timeout of 1 ms to wait for DMM transaction to
      finish. While DMM should always finish the operation within that time,
      the timeout is rather strict. Small misbehavior of the system (e.g. an
      irq taking too long) could trigger the timeout.
      
      As the DMM is a critical piece of code for display memory management,
      let's increase the timeout to 100 ms so that we are less likely to fail
      a memory allocation in case of system misbehaviors. 100 ms is just a
      guess of a reasonably large timeout. The HW should accomplish the task
      in less than 1 ms.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      96cbd142
  9. 12 Jun, 2015 1 commit
  10. 24 Mar, 2015 4 commits
    • Grygorii Strashko's avatar
      drm/omap: tiler: add hibernation callback · 1d601da2
      Grygorii Strashko authored
      Setting a dev_pm_ops resume callback but not a set of hibernation
      handler means that pm function will not be called upon hibernation.
      
      Fix this by using SIMPLE_DEV_PM_OPS, which appropriately assigns the
      suspend and hibernation handlers and move omap_dmm_resume under
      CONFIG_PM_SLEEP to avoid build warnings.
      Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@linaro.org>
      Reviewed-by: default avatarRob Clark <robdclark@gmail.com>
      [tomi valkeinen: add missing 'static']
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      1d601da2
    • Tomi Valkeinen's avatar
      drm/omap: fix race conditon in DMM · 7439507f
      Tomi Valkeinen authored
      The omapdrm DMM code sometimes crashes with:
      
      WARNING: CPU: 0 PID: 1235 at lib/list_debug.c:36 __list_add+0x8c/0xbc()
      list_add double add: new=e9265368, prev=e90139c4, next=e9265368.
      
      This is caused by the code calling release_engine() twice for the same
      engine.
      
      dmm_txn_commit(wait=true) call is supposed to wait until the DMM
      transaction has been finished. And it does that, but it does not wait
      for the irq handler to finish.
      
      What happens is that the irq handler is triggered, and it either wakes
      up the thread that called dmm_txn_commit(), or that thread never even
      slept because the transaction was finished in the HW very quickly. That
      thread then continues executing, even if the irq handler is not yet
      finished, and a new transaction may be initiated. If that transaction is
      async (i.e. wait=false), a 'async' flag is set to true. The original irq
      handler, which has yet not finished, then sees the transaction as
      'async', even if it was supposed to be 'sync'.
      
      When that happens, the irq handler does an extra release_engine() call
      because it thinks it need to release the engine, leading to the crash.
      
      This patch fixes the issue by using completion to ensure that the irq
      handler has finished before a dmm_txn_commit(wait=true) may continue.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      7439507f
    • Tomi Valkeinen's avatar
      drm/omap: tiler: fix race condition with engine->async · e7e24df4
      Tomi Valkeinen authored
      The tiler irq handler uses engine->async value, but the code that sets
      engine->async and enables the interrupt does not have a barrier. This
      may cause the irq handler to see the old value of engine->async, causing
      memory corruption.
      Reported-by: default avatarHarinarayan Bhatta <harinarayan@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      e7e24df4
    • Tomi Valkeinen's avatar
      drm/omap: fix TILER on OMAP5 · 7cb0d6c1
      Tomi Valkeinen authored
      On OMAP5 it is not possible to use TILER buffer with CPU when caching or
      write-combining is used. Doing so leads to errors from the memory
      manager.
      
      However, on OMAP4, write-combining works fine.
      
      This patch adds platform specific data for the TILER, and a function
      tiler_get_cpu_cache_flags() which can be used to get the caching mode to
      be used.
      
      Note that without write-combining the use of the TILER buffer with CPU
      is unusably slow. It's still good to have it operational for testing
      purposes.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      7cb0d6c1
  11. 20 Mar, 2015 1 commit
  12. 22 Jul, 2014 1 commit
    • Russell King's avatar
      drm: omapdrm: fix compiler errors · 2d31ca3a
      Russell King authored
      Regular randconfig nightly testing has detected problems with omapdrm.
      
      omapdrm fails to build when the kernel is built to support 64-bit DMA
      addresses and/or 64-bit physical addresses due to an assumption about
      the width of these types.
      
      Use %pad to print DMA addresses, rather than %x or %Zx (which is even
      more wrong than %x).  Avoid passing a uint32_t pointer into a function
      which expects dma_addr_t pointer.
      
      drivers/gpu/drm/omapdrm/omap_plane.c: In function 'omap_plane_pre_apply':
      drivers/gpu/drm/omapdrm/omap_plane.c:145:2: error: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'dma_addr_t' [-Werror=format]
      drivers/gpu/drm/omapdrm/omap_plane.c:145:2: error: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t' [-Werror=format]
      make[5]: *** [drivers/gpu/drm/omapdrm/omap_plane.o] Error 1
      drivers/gpu/drm/omapdrm/omap_gem.c: In function 'omap_gem_get_paddr':
      drivers/gpu/drm/omapdrm/omap_gem.c:794:4: error: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'dma_addr_t' [-Werror=format]
      drivers/gpu/drm/omapdrm/omap_gem.c: In function 'omap_gem_describe':
      drivers/gpu/drm/omapdrm/omap_gem.c:991:4: error: format '%Zx' expects argument of type 'size_t', but argument 7 has type 'dma_addr_t' [-Werror=format]
      drivers/gpu/drm/omapdrm/omap_gem.c: In function 'omap_gem_init':
      drivers/gpu/drm/omapdrm/omap_gem.c:1470:4: error: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'dma_addr_t' [-Werror=format]
      make[5]: *** [drivers/gpu/drm/omapdrm/omap_gem.o] Error 1
      drivers/gpu/drm/omapdrm/omap_dmm_tiler.c: In function 'dmm_txn_append':
      drivers/gpu/drm/omapdrm/omap_dmm_tiler.c:226:2: error: passing argument 3 of 'alloc_dma' from incompatible pointer type [-Werror]
      make[5]: *** [drivers/gpu/drm/omapdrm/omap_dmm_tiler.o] Error 1
      make[5]: Target `__build' not remade because of errors.
      make[4]: *** [drivers/gpu/drm/omapdrm] Error 2
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      2d31ca3a
  13. 09 Jan, 2014 1 commit
  14. 31 Oct, 2013 1 commit
  15. 29 Aug, 2013 1 commit
  16. 16 Feb, 2013 3 commits
    • Rob Clark's avatar
      drm/omap: move out of staging · 8bb0daff
      Rob Clark authored
      Now that the omapdss interface has been reworked so that omapdrm can use
      dispc directly, we have been able to fix the remaining functional kms
      issues with omapdrm.  And in the mean time the PM sequencing and many
      other of that open issues have been solved.  So I think it makes sense
      to finally move omapdrm out of staging.
      Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
      8bb0daff
    • Andy Gross's avatar
      drm/omap: Add OMAP5 support · 238083ad
      Andy Gross authored
      Add support for OMAP5 processor.  The main differences are that the OMAP5
      has 2 containers, one for 1D and one for 2D.  Each container is 128MiB in
      size.
      Signed-off-by: default avatarAndy Gross <andy.gross@ti.com>
      Signed-off-by: default avatarRob Clark <rob@ti.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      238083ad
    • Andy Gross's avatar
      drm/omap: Add PM capabilities · 4836d157
      Andy Gross authored
      Added power management capabilities into the omapdrm and DMM drivers.
      During suspend, we don't need to do anything to maintain the state of
      the LUT.  We have all the necessary information to recreate the mappings
      of the GEM object list maintained by the omapdrm driver.
      
      On resume, the DMM resume handler will first reprogram the LUT to point
      to the dummy page.  The subsequent resume handler in the omapdrm will call
      into the DMM and reprogram each of the buffer objects.  This will ensure
      that all of the necessary objects will be pinned into the DMM properly.
      
      Order of suspend/resume handlers is done by device creation.  We create
      the DMM device before the omapdrm, so the correct order is maintained.
      Signed-off-by: default avatarAndy Gross <andy.gross@ti.com>
      Signed-off-by: default avatarRob Clark <rob@ti.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      4836d157
  17. 11 Feb, 2013 1 commit
  18. 17 Jan, 2013 2 commits
    • Andy Gross's avatar
      drm/omap: Add OMAP5 support · c6b7ae55
      Andy Gross authored
      Add support for OMAP5 processor.  The main differences are that the OMAP5
      has 2 containers, one for 1D and one for 2D.  Each container is 128MiB in
      size.
      Signed-off-by: default avatarAndy Gross <andy.gross@ti.com>
      Signed-off-by: default avatarRob Clark <rob@ti.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c6b7ae55
    • Andy Gross's avatar
      drm/omap: Add PM capabilities · e78edba1
      Andy Gross authored
      Added power management capabilities into the omapdrm and DMM drivers.
      During suspend, we don't need to do anything to maintain the state of
      the LUT.  We have all the necessary information to recreate the mappings
      of the GEM object list maintained by the omapdrm driver.
      
      On resume, the DMM resume handler will first reprogram the LUT to point
      to the dummy page.  The subsequent resume handler in the omapdrm will call
      into the DMM and reprogram each of the buffer objects.  This will ensure
      that all of the necessary objects will be pinned into the DMM properly.
      
      Order of suspend/resume handlers is done by device creation.  We create
      the DMM device before the omapdrm, so the correct order is maintained.
      Signed-off-by: default avatarAndy Gross <andy.gross@ti.com>
      Signed-off-by: default avatarRob Clark <rob@ti.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      e78edba1
  19. 16 Nov, 2012 1 commit
  20. 13 Nov, 2012 1 commit
  21. 22 Oct, 2012 4 commits
  22. 15 Aug, 2012 1 commit
  23. 14 Aug, 2012 1 commit
  24. 11 Jun, 2012 1 commit
  25. 10 Apr, 2012 1 commit
  26. 07 Mar, 2012 2 commits
  27. 16 Dec, 2011 1 commit
  28. 13 Dec, 2011 1 commit