msr.h 10.8 KB
Newer Older
1
/* SPDX-License-Identifier: GPL-2.0 */
2 3
#ifndef _ASM_X86_MSR_H
#define _ASM_X86_MSR_H
Thomas Gleixner's avatar
Thomas Gleixner committed
4

5
#include "msr-index.h"
Thomas Gleixner's avatar
Thomas Gleixner committed
6

7
#ifndef __ASSEMBLY__
8 9 10

#include <asm/asm.h>
#include <asm/errno.h>
11
#include <asm/cpumask.h>
12
#include <uapi/asm/msr.h>
13 14 15 16 17 18 19 20 21 22

struct msr {
	union {
		struct {
			u32 l;
			u32 h;
		};
		u64 q;
	};
};
23

24 25 26 27 28 29 30 31 32 33 34 35
struct msr_info {
	u32 msr_no;
	struct msr reg;
	struct msr *msrs;
	int err;
};

struct msr_regs_info {
	u32 *regs;
	int err;
};

36 37 38 39 40 41 42 43 44 45
struct saved_msr {
	bool valid;
	struct msr_info info;
};

struct saved_msrs {
	unsigned int num;
	struct saved_msr *array;
};

46
/*
47 48 49 50
 * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
 * constraint has different meanings. For i386, "A" means exactly
 * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
 * it means rax *or* rdx.
51 52
 */
#ifdef CONFIG_X86_64
53 54 55
/* Using 64-bit values saves one instruction clearing the high half of low */
#define DECLARE_ARGS(val, low, high)	unsigned long low, high
#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
56 57 58 59 60
#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
#else
#define DECLARE_ARGS(val, low, high)	unsigned long long val
#define EAX_EDX_VAL(val, low, high)	(val)
#define EAX_EDX_RET(val, low, high)	"=A" (val)
61 62
#endif

63 64 65 66 67 68 69 70 71 72 73
#ifdef CONFIG_TRACEPOINTS
/*
 * Be very careful with includes. This header is prone to include loops.
 */
#include <asm/atomic.h>
#include <linux/tracepoint-defs.h>

extern struct tracepoint __tracepoint_read_msr;
extern struct tracepoint __tracepoint_write_msr;
extern struct tracepoint __tracepoint_rdpmc;
#define msr_tracepoint_active(t) static_key_false(&(t).key)
74 75 76
extern void do_trace_write_msr(unsigned int msr, u64 val, int failed);
extern void do_trace_read_msr(unsigned int msr, u64 val, int failed);
extern void do_trace_rdpmc(unsigned int msr, u64 val, int failed);
77 78
#else
#define msr_tracepoint_active(t) false
79 80 81
static inline void do_trace_write_msr(unsigned int msr, u64 val, int failed) {}
static inline void do_trace_read_msr(unsigned int msr, u64 val, int failed) {}
static inline void do_trace_rdpmc(unsigned int msr, u64 val, int failed) {}
82 83
#endif

84 85 86 87 88 89 90 91
/*
 * __rdmsr() and __wrmsr() are the two primitives which are the bare minimum MSR
 * accessors and should not have any tracing or other functionality piggybacking
 * on them - those are *purely* for accessing MSRs and nothing more. So don't even
 * think of extending them - you will be slapped with a stinking trout or a frozen
 * shark will reach you, wherever you are! You've been warned.
 */
static inline unsigned long long notrace __rdmsr(unsigned int msr)
Thomas Gleixner's avatar
Thomas Gleixner committed
92
{
93
	DECLARE_ARGS(val, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
94

95 96 97 98
	asm volatile("1: rdmsr\n"
		     "2:\n"
		     _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_rdmsr_unsafe)
		     : EAX_EDX_RET(val, low, high) : "c" (msr));
99

100
	return EAX_EDX_VAL(val, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
101 102
}

103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122
static inline void notrace __wrmsr(unsigned int msr, u32 low, u32 high)
{
	asm volatile("1: wrmsr\n"
		     "2:\n"
		     _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_wrmsr_unsafe)
		     : : "c" (msr), "a"(low), "d" (high) : "memory");
}

static inline unsigned long long native_read_msr(unsigned int msr)
{
	unsigned long long val;

	val = __rdmsr(msr);

	if (msr_tracepoint_active(__tracepoint_read_msr))
		do_trace_read_msr(msr, val, 0);

	return val;
}

Thomas Gleixner's avatar
Thomas Gleixner committed
123 124 125
static inline unsigned long long native_read_msr_safe(unsigned int msr,
						      int *err)
{
126
	DECLARE_ARGS(val, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
127

128
	asm volatile("2: rdmsr ; xor %[err],%[err]\n"
Thomas Gleixner's avatar
Thomas Gleixner committed
129 130
		     "1:\n\t"
		     ".section .fixup,\"ax\"\n\t"
131 132 133 134
		     "3: mov %[fault],%[err]\n\t"
		     "xorl %%eax, %%eax\n\t"
		     "xorl %%edx, %%edx\n\t"
		     "jmp 1b\n\t"
Thomas Gleixner's avatar
Thomas Gleixner committed
135
		     ".previous\n\t"
136
		     _ASM_EXTABLE(2b, 3b)
137
		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
138
		     : "c" (msr), [fault] "i" (-EIO));
139 140
	if (msr_tracepoint_active(__tracepoint_read_msr))
		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
141
	return EAX_EDX_VAL(val, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
142 143
}

Wanpeng Li's avatar
Wanpeng Li committed
144
/* Can be uninlined because referenced by paravirt */
145 146
static inline void notrace
native_write_msr(unsigned int msr, u32 low, u32 high)
Wanpeng Li's avatar
Wanpeng Li committed
147
{
148 149
	__wrmsr(msr, low, high);

150
	if (msr_tracepoint_active(__tracepoint_write_msr))
151
		do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
Thomas Gleixner's avatar
Thomas Gleixner committed
152 153
}

154
/* Can be uninlined because referenced by paravirt */
155 156
static inline int notrace
native_write_msr_safe(unsigned int msr, u32 low, u32 high)
Thomas Gleixner's avatar
Thomas Gleixner committed
157 158
{
	int err;
159

160
	asm volatile("2: wrmsr ; xor %[err],%[err]\n"
Thomas Gleixner's avatar
Thomas Gleixner committed
161 162
		     "1:\n\t"
		     ".section .fixup,\"ax\"\n\t"
163
		     "3:  mov %[fault],%[err] ; jmp 1b\n\t"
Thomas Gleixner's avatar
Thomas Gleixner committed
164
		     ".previous\n\t"
165
		     _ASM_EXTABLE(2b, 3b)
166
		     : [err] "=a" (err)
167
		     : "c" (msr), "0" (low), "d" (high),
168
		       [fault] "i" (-EIO)
169
		     : "memory");
170
	if (msr_tracepoint_active(__tracepoint_write_msr))
171
		do_trace_write_msr(msr, ((u64)high << 32 | low), err);
Thomas Gleixner's avatar
Thomas Gleixner committed
172 173 174
	return err;
}

175 176
extern int rdmsr_safe_regs(u32 regs[8]);
extern int wrmsr_safe_regs(u32 regs[8]);
177

178 179 180 181 182 183 184 185 186 187
/**
 * rdtsc() - returns the current TSC without ordering constraints
 *
 * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
 * only ordering constraint it supplies is the ordering implied by
 * "asm volatile": it will put the RDTSC in the place you expect.  The
 * CPU can and will speculatively execute that RDTSC, though, so the
 * results can be non-monotonic if compared on different CPUs.
 */
static __always_inline unsigned long long rdtsc(void)
Ingo Molnar's avatar
Ingo Molnar committed
188 189 190 191 192 193 194 195
{
	DECLARE_ARGS(val, low, high);

	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));

	return EAX_EDX_VAL(val, low, high);
}

196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216
/**
 * rdtsc_ordered() - read the current TSC in program order
 *
 * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
 * It is ordered like a load to a global in-memory counter.  It should
 * be impossible to observe non-monotonic rdtsc_unordered() behavior
 * across multiple CPUs as long as the TSC is synced.
 */
static __always_inline unsigned long long rdtsc_ordered(void)
{
	/*
	 * The RDTSC instruction is not ordered relative to memory
	 * access.  The Intel SDM and the AMD APM are both vague on this
	 * point, but empirically an RDTSC instruction can be
	 * speculatively executed before prior loads.  An RDTSC
	 * immediately after an appropriate barrier appears to be
	 * ordered as a normal load, that is, it provides the same
	 * ordering guarantees as reading from a global memory location
	 * that some other imaginary CPU is updating continuously with a
	 * time stamp.
	 */
Dan Williams's avatar
Dan Williams committed
217
	barrier_nospec();
218 219 220
	return rdtsc();
}

221 222 223
/* Deprecated, keep it for a cycle for easier merging: */
#define rdtscll(now)	do { (now) = rdtsc_ordered(); } while (0)

224
static inline unsigned long long native_read_pmc(int counter)
Thomas Gleixner's avatar
Thomas Gleixner committed
225
{
226 227 228
	DECLARE_ARGS(val, low, high);

	asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
229 230
	if (msr_tracepoint_active(__tracepoint_rdpmc))
		do_trace_rdpmc(counter, EAX_EDX_VAL(val, low, high), 0);
231
	return EAX_EDX_VAL(val, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
232 233 234 235
}

#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
236
#else
Thomas Gleixner's avatar
Thomas Gleixner committed
237 238 239 240 241 242 243
#include <linux/errno.h>
/*
 * Access to machine-specific registers (available on 586 and better only)
 * Note: the rd* operations modify the parameters directly (without using
 * pointer indirection), this allows gcc to optimize better
 */

244
#define rdmsr(msr, low, high)					\
245 246
do {								\
	u64 __val = native_read_msr((msr));			\
247 248
	(void)((low) = (u32)__val);				\
	(void)((high) = (u32)(__val >> 32));			\
249
} while (0)
Thomas Gleixner's avatar
Thomas Gleixner committed
250

251
static inline void wrmsr(unsigned int msr, u32 low, u32 high)
Thomas Gleixner's avatar
Thomas Gleixner committed
252
{
253
	native_write_msr(msr, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
254 255
}

256 257
#define rdmsrl(msr, val)			\
	((val) = native_read_msr((msr)))
Thomas Gleixner's avatar
Thomas Gleixner committed
258

259
static inline void wrmsrl(unsigned int msr, u64 val)
260
{
261
	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
262
}
Thomas Gleixner's avatar
Thomas Gleixner committed
263 264

/* wrmsr with exception handling */
265
static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)
Thomas Gleixner's avatar
Thomas Gleixner committed
266
{
267
	return native_write_msr_safe(msr, low, high);
Thomas Gleixner's avatar
Thomas Gleixner committed
268 269
}

270
/* rdmsr with exception handling */
271
#define rdmsr_safe(msr, low, high)				\
272 273 274
({								\
	int __err;						\
	u64 __val = native_read_msr_safe((msr), &__err);	\
275 276
	(*low) = (u32)__val;					\
	(*high) = (u32)(__val >> 32);				\
277 278
	__err;							\
})
Thomas Gleixner's avatar
Thomas Gleixner committed
279

280
static inline int rdmsrl_safe(unsigned int msr, unsigned long long *p)
Andi Kleen's avatar
Andi Kleen committed
281 282 283 284 285 286
{
	int err;

	*p = native_read_msr_safe(msr, &err);
	return err;
}
287

288 289 290 291 292 293
#define rdpmc(counter, low, high)			\
do {							\
	u64 _l = native_read_pmc((counter));		\
	(low)  = (u32)_l;				\
	(high) = (u32)(_l >> 32);			\
} while (0)
Thomas Gleixner's avatar
Thomas Gleixner committed
294

Andi Kleen's avatar
Andi Kleen committed
295 296
#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))

297 298
#endif	/* !CONFIG_PARAVIRT */

299 300 301 302 303 304 305
/*
 * 64-bit version of wrmsr_safe():
 */
static inline int wrmsrl_safe(u32 msr, u64 val)
{
	return wrmsr_safe(msr, (u32)val,  (u32)(val >> 32));
}
Thomas Gleixner's avatar
Thomas Gleixner committed
306

307
#define write_tsc(low, high) wrmsr(MSR_IA32_TSC, (low), (high))
Thomas Gleixner's avatar
Thomas Gleixner committed
308

309
#define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0)
Thomas Gleixner's avatar
Thomas Gleixner committed
310

311 312
struct msr *msrs_alloc(void);
void msrs_free(struct msr *msrs);
313 314
int msr_set_bit(u32 msr, u8 bit);
int msr_clear_bit(u32 msr, u8 bit);
315

Thomas Gleixner's avatar
Thomas Gleixner committed
316
#ifdef CONFIG_SMP
317 318
int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
319 320
int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
321 322
void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
Thomas Gleixner's avatar
Thomas Gleixner committed
323 324
int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
325 326
int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
327 328
int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
Thomas Gleixner's avatar
Thomas Gleixner committed
329
#else  /*  CONFIG_SMP  */
330
static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
Thomas Gleixner's avatar
Thomas Gleixner committed
331 332
{
	rdmsr(msr_no, *l, *h);
333
	return 0;
Thomas Gleixner's avatar
Thomas Gleixner committed
334
}
335
static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
Thomas Gleixner's avatar
Thomas Gleixner committed
336 337
{
	wrmsr(msr_no, l, h);
338
	return 0;
Thomas Gleixner's avatar
Thomas Gleixner committed
339
}
340 341 342 343 344 345 346 347 348 349
static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
	rdmsrl(msr_no, *q);
	return 0;
}
static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
{
	wrmsrl(msr_no, q);
	return 0;
}
350
static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
351 352
				struct msr *msrs)
{
353
	rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
354
}
355
static inline void wrmsr_on_cpus(const struct cpumask *m, u32 msr_no,
356 357
				struct msr *msrs)
{
358
	wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
359
}
360 361
static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
				    u32 *l, u32 *h)
Thomas Gleixner's avatar
Thomas Gleixner committed
362 363 364 365 366 367 368
{
	return rdmsr_safe(msr_no, l, h);
}
static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
	return wrmsr_safe(msr_no, l, h);
}
369 370 371 372 373 374 375 376
static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
{
	return rdmsrl_safe(msr_no, q);
}
static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
{
	return wrmsrl_safe(msr_no, q);
}
377 378 379 380 381 382 383 384
static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
{
	return rdmsr_safe_regs(regs);
}
static inline int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
{
	return wrmsr_safe_regs(regs);
}
Thomas Gleixner's avatar
Thomas Gleixner committed
385
#endif  /* CONFIG_SMP */
386
#endif /* __ASSEMBLY__ */
387
#endif /* _ASM_X86_MSR_H */