Commit 6dc75ccb authored by Stanislaw Gruszka's avatar Stanislaw Gruszka Committed by Greg Kroah-Hartman

lib/div64.c: off by one in shift

[ Upstream commit cdc94a37493135e355dfc0b0e086d84e3eadb50d ]

fls counts bits starting from 1 to 32 (returns 0 for zero argument).  If
we add 1 we shift right one bit more and loose precision from divisor,
what cause function incorect results with some numbers.

Corrected code was tested in user-space, see bugzilla:
   https://bugzilla.kernel.org/show_bug.cgi?id=202391

Link: http://lkml.kernel.org/r/1548686944-11891-1-git-send-email-sgruszka@redhat.com
Fixes: 658716d1 ("div64_u64(): improve precision on 32bit platforms")
Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Reported-by: default avatarSiarhei Volkau <lis8215@gmail.com>
Tested-by: default avatarSiarhei Volkau <lis8215@gmail.com>
Acked-by: default avatarOleg Nesterov <oleg@redhat.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 0ba1fa56
......@@ -103,7 +103,7 @@ u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder)
quot = div_u64_rem(dividend, divisor, &rem32);
*remainder = rem32;
} else {
int n = 1 + fls(high);
int n = fls(high);
quot = div_u64(dividend >> n, divisor >> n);
if (quot != 0)
......@@ -141,7 +141,7 @@ u64 div64_u64(u64 dividend, u64 divisor)
if (high == 0) {
quot = div_u64(dividend, divisor);
} else {
int n = 1 + fls(high);
int n = fls(high);
quot = div_u64(dividend >> n, divisor >> n);
if (quot != 0)
......
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