Commit bb8187d3 authored by Paul Gortmaker's avatar Paul Gortmaker

MCA: delete all remaining traces of microchannel bus support.

Hardware with MCA bus is limited to 386 and 486 class machines
that are now 20+ years old and typically with less than 32MB
of memory.  A quick search on the internet, and you see that
even the MCA hobbyist/enthusiast community has lost interest
in the early 2000 era and never really even moved ahead from
the 2.4 kernels to the 2.6 series.

This deletes anything remaining related to CONFIG_MCA from core
kernel code and from the x86 architecture.  There is no point in
carrying this any further into the future.

One complication to watch for is inadvertently scooping up
stuff relating to machine check, since there is overlap in
the TLA name space (e.g. arch/x86/boot/mca.c).

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: James Bottomley <JBottomley@Parallels.com>
Cc: x86@kernel.org
Acked-by: default avatarIngo Molnar <mingo@elte.hu>
Acked-by: default avatarH. Peter Anvin <hpa@zytor.com>
Signed-off-by: default avatarPaul Gortmaker <paul.gortmaker@windriver.com>
parent a88dc06c
......@@ -218,8 +218,6 @@ m68k/
- directory with info about Linux on Motorola 68k architecture.
magic-number.txt
- list of magic numbers used to mark/protect kernel data structures.
mca.txt
- info on supporting Micro Channel Architecture (e.g. PS/2) systems.
md.txt
- info on boot arguments for the multiple devices driver.
memory-barriers.txt
......
......@@ -6,7 +6,7 @@
# To add a new book the only step required is to add the book to the
# list of DOCBOOKS.
DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \
DOCBOOKS := z8530book.xml device-drivers.xml \
kernel-hacking.xml kernel-locking.xml deviceiobook.xml \
writing_usb_driver.xml networking.xml \
kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \
......
......@@ -212,19 +212,6 @@ X!Edrivers/pci/hotplug.c
<sect1><title>PCI Hotplug Support Library</title>
!Edrivers/pci/hotplug/pci_hotplug_core.c
</sect1>
<sect1><title>MCA Architecture</title>
<sect2><title>MCA Device Functions</title>
<para>
Refer to the file arch/x86/kernel/mca_32.c for more information.
</para>
<!-- FIXME: Removed for now since no structured comments in source
X!Earch/x86/kernel/mca_32.c
-->
</sect2>
<sect2><title>MCA Bus DMA</title>
!Iarch/x86/include/asm/mca_dma.h
</sect2>
</sect1>
</chapter>
<chapter id="firmware">
......
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
<book id="MCAGuide">
<bookinfo>
<title>MCA Driver Programming Interface</title>
<authorgroup>
<author>
<firstname>Alan</firstname>
<surname>Cox</surname>
<affiliation>
<address>
<email>alan@lxorguk.ukuu.org.uk</email>
</address>
</affiliation>
</author>
<author>
<firstname>David</firstname>
<surname>Weinehall</surname>
</author>
<author>
<firstname>Chris</firstname>
<surname>Beauregard</surname>
</author>
</authorgroup>
<copyright>
<year>2000</year>
<holder>Alan Cox</holder>
<holder>David Weinehall</holder>
<holder>Chris Beauregard</holder>
</copyright>
<legalnotice>
<para>
This documentation is free software; you can redistribute
it and/or modify it under the terms of the GNU General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later
version.
</para>
<para>
This program is distributed in the hope that it will be
useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
</para>
<para>
You should have received a copy of the GNU General Public
License along with this program; if not, write to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
MA 02111-1307 USA
</para>
<para>
For more details see the file COPYING in the source
distribution of Linux.
</para>
</legalnotice>
</bookinfo>
<toc></toc>
<chapter id="intro">
<title>Introduction</title>
<para>
The MCA bus functions provide a generalised interface to find MCA
bus cards, to claim them for a driver, and to read and manipulate POS
registers without being aware of the motherboard internals or
certain deep magic specific to onboard devices.
</para>
<para>
The basic interface to the MCA bus devices is the slot. Each slot
is numbered and virtual slot numbers are assigned to the internal
devices. Using a pci_dev as other busses do does not really make
sense in the MCA context as the MCA bus resources require card
specific interpretation.
</para>
<para>
Finally the MCA bus functions provide a parallel set of DMA
functions mimicing the ISA bus DMA functions as closely as possible,
although also supporting the additional DMA functionality on the
MCA bus controllers.
</para>
</chapter>
<chapter id="bugs">
<title>Known Bugs And Assumptions</title>
<para>
None.
</para>
</chapter>
<chapter id="pubfunctions">
<title>Public Functions Provided</title>
!Edrivers/mca/mca-legacy.c
</chapter>
<chapter id="dmafunctions">
<title>DMA Functions Provided</title>
!Iarch/x86/include/asm/mca_dma.h
</chapter>
</book>
......@@ -846,13 +846,7 @@ Your cooperation is appreciated.
...
31 = /dev/tap15 16th Ethertap device
36 block MCA ESDI hard disk
0 = /dev/eda First ESDI disk whole disk
64 = /dev/edb Second ESDI disk whole disk
...
Partitions are handled in the same way as IDE disks
(see major number 3).
36 block OBSOLETE (was MCA ESDI hard disk)
37 char IDE tape
0 = /dev/ht0 First IDE tape
......
......@@ -179,7 +179,7 @@ CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.
Converting an EISA driver to the new API mostly involves *deleting*
code (since probing is now in the core EISA code). Unfortunately, most
drivers share their probing routine between ISA, MCA and EISA. Special
drivers share their probing routine between ISA, and EISA. Special
care must be taken when ripping out the EISA code, so other busses
won't suffer from these surgical strikes...
......
......@@ -70,7 +70,6 @@ parameter is applicable:
M68k M68k architecture is enabled.
These options have more detailed description inside of
Documentation/m68k/kernel-options.txt.
MCA MCA bus support is enabled.
MDA MDA console support is enabled.
MIPS MIPS architecture is enabled.
MOUSE Appropriate mouse support is enabled.
......
This diff is collapsed.
......@@ -3316,12 +3316,6 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git
S: Maintained
F: arch/ia64/
IBM MCA SCSI SUBSYSTEM DRIVER
M: Michael Lang <langa2@kph.uni-mainz.de>
W: http://www.uni-mainz.de/~langm000/linux.html
S: Maintained
F: drivers/scsi/ibmmca.c
IBM Power Linux RAID adapter
M: Brian King <brking@us.ibm.com>
S: Supported
......@@ -4418,13 +4412,6 @@ T: git git://git.monstr.eu/linux-2.6-microblaze.git
S: Supported
F: arch/microblaze/
MICROCHANNEL ARCHITECTURE (MCA)
M: James Bottomley <James.Bottomley@HansenPartnership.com>
S: Maintained
F: Documentation/mca.txt
F: drivers/mca/
F: include/linux/mca*
MICROTEK X6 SCANNER
M: Oliver Neukum <oliver@neukum.name>
S: Maintained
......
......@@ -54,7 +54,6 @@ extern struct cpuinfo_frv __nongprelbss boot_cpu_data;
* Bus types
*/
#define EISA_bus 0
#define MCA_bus 0
struct thread_struct {
struct pt_regs *frame; /* [GR28] exception frame ptr for this thread */
......
......@@ -2023,16 +2023,6 @@ config EISA
source "drivers/eisa/Kconfig"
config MCA
bool "MCA support"
---help---
MicroChannel Architecture is found in some IBM PS/2 machines and
laptops. It is a bus system similar to PCI or ISA. See
<file:Documentation/mca.txt> (and especially the web page given
there) before attempting to build an MCA bus kernel.
source "drivers/mca/Kconfig"
config SCx200
tristate "NatSemi SCx200 support"
---help---
......
/* -*- mode: c; c-basic-offset: 8 -*- */
/* Platform specific MCA defines */
#ifndef _ASM_X86_MCA_H
#define _ASM_X86_MCA_H
/* Maximal number of MCA slots - actually, some machines have less, but
* they all have sufficient number of POS registers to cover 8.
*/
#define MCA_MAX_SLOT_NR 8
/* Most machines have only one MCA bus. The only multiple bus machines
* I know have at most two */
#define MAX_MCA_BUSSES 2
#define MCA_PRIMARY_BUS 0
#define MCA_SECONDARY_BUS 1
/* Dummy slot numbers on primary MCA for integrated functions */
#define MCA_INTEGSCSI (MCA_MAX_SLOT_NR)
#define MCA_INTEGVIDEO (MCA_MAX_SLOT_NR+1)
#define MCA_MOTHERBOARD (MCA_MAX_SLOT_NR+2)
/* Dummy POS values for integrated functions */
#define MCA_DUMMY_POS_START 0x10000
#define MCA_INTEGSCSI_POS (MCA_DUMMY_POS_START+1)
#define MCA_INTEGVIDEO_POS (MCA_DUMMY_POS_START+2)
#define MCA_MOTHERBOARD_POS (MCA_DUMMY_POS_START+3)
/* MCA registers */
#define MCA_MOTHERBOARD_SETUP_REG 0x94
#define MCA_ADAPTER_SETUP_REG 0x96
#define MCA_POS_REG(n) (0x100+(n))
#define MCA_ENABLED 0x01 /* POS 2, set if adapter enabled */
/* Max number of adapters, including both slots and various integrated
* things.
*/
#define MCA_NUMADAPTERS (MCA_MAX_SLOT_NR+3)
#endif /* _ASM_X86_MCA_H */
#ifndef _ASM_X86_MCA_DMA_H
#define _ASM_X86_MCA_DMA_H
#include <asm/io.h>
#include <linux/ioport.h>
/*
* Microchannel specific DMA stuff. DMA on an MCA machine is fairly similar to
* standard PC dma, but it certainly has its quirks. DMA register addresses
* are in a different place and there are some added functions. Most of this
* should be pretty obvious on inspection. Note that the user must divide
* count by 2 when using 16-bit dma; that is not handled by these functions.
*
* Ramen Noodles are yummy.
*
* 1998 Tymm Twillman <tymm@computer.org>
*/
/*
* Registers that are used by the DMA controller; FN is the function register
* (tell the controller what to do) and EXE is the execution register (how
* to do it)
*/
#define MCA_DMA_REG_FN 0x18
#define MCA_DMA_REG_EXE 0x1A
/*
* Functions that the DMA controller can do
*/
#define MCA_DMA_FN_SET_IO 0x00
#define MCA_DMA_FN_SET_ADDR 0x20
#define MCA_DMA_FN_GET_ADDR 0x30
#define MCA_DMA_FN_SET_COUNT 0x40
#define MCA_DMA_FN_GET_COUNT 0x50
#define MCA_DMA_FN_GET_STATUS 0x60
#define MCA_DMA_FN_SET_MODE 0x70
#define MCA_DMA_FN_SET_ARBUS 0x80
#define MCA_DMA_FN_MASK 0x90
#define MCA_DMA_FN_RESET_MASK 0xA0
#define MCA_DMA_FN_MASTER_CLEAR 0xD0
/*
* Modes (used by setting MCA_DMA_FN_MODE in the function register)
*
* Note that the MODE_READ is read from memory (write to device), and
* MODE_WRITE is vice-versa.
*/
#define MCA_DMA_MODE_XFER 0x04 /* read by default */
#define MCA_DMA_MODE_READ 0x04 /* same as XFER */
#define MCA_DMA_MODE_WRITE 0x08 /* OR with MODE_XFER to use */
#define MCA_DMA_MODE_IO 0x01 /* DMA from IO register */
#define MCA_DMA_MODE_16 0x40 /* 16 bit xfers */
/**
* mca_enable_dma - channel to enable DMA on
* @dmanr: DMA channel
*
* Enable the MCA bus DMA on a channel. This can be called from
* IRQ context.
*/
static inline void mca_enable_dma(unsigned int dmanr)
{
outb(MCA_DMA_FN_RESET_MASK | dmanr, MCA_DMA_REG_FN);
}
/**
* mca_disble_dma - channel to disable DMA on
* @dmanr: DMA channel
*
* Enable the MCA bus DMA on a channel. This can be called from
* IRQ context.
*/
static inline void mca_disable_dma(unsigned int dmanr)
{
outb(MCA_DMA_FN_MASK | dmanr, MCA_DMA_REG_FN);
}
/**
* mca_set_dma_addr - load a 24bit DMA address
* @dmanr: DMA channel
* @a: 24bit bus address
*
* Load the address register in the DMA controller. This has a 24bit
* limitation (16Mb).
*/
static inline void mca_set_dma_addr(unsigned int dmanr, unsigned int a)
{
outb(MCA_DMA_FN_SET_ADDR | dmanr, MCA_DMA_REG_FN);
outb(a & 0xff, MCA_DMA_REG_EXE);
outb((a >> 8) & 0xff, MCA_DMA_REG_EXE);
outb((a >> 16) & 0xff, MCA_DMA_REG_EXE);
}
/**
* mca_get_dma_addr - load a 24bit DMA address
* @dmanr: DMA channel
*
* Read the address register in the DMA controller. This has a 24bit
* limitation (16Mb). The return is a bus address.
*/
static inline unsigned int mca_get_dma_addr(unsigned int dmanr)
{
unsigned int addr;
outb(MCA_DMA_FN_GET_ADDR | dmanr, MCA_DMA_REG_FN);
addr = inb(MCA_DMA_REG_EXE);
addr |= inb(MCA_DMA_REG_EXE) << 8;
addr |= inb(MCA_DMA_REG_EXE) << 16;
return addr;
}
/**
* mca_set_dma_count - load a 16bit transfer count
* @dmanr: DMA channel
* @count: count
*
* Set the DMA count for this channel. This can be up to 64Kbytes.
* Setting a count of zero will not do what you expect.
*/
static inline void mca_set_dma_count(unsigned int dmanr, unsigned int count)
{
count--; /* transfers one more than count -- correct for this */
outb(MCA_DMA_FN_SET_COUNT | dmanr, MCA_DMA_REG_FN);
outb(count & 0xff, MCA_DMA_REG_EXE);
outb((count >> 8) & 0xff, MCA_DMA_REG_EXE);
}
/**
* mca_get_dma_residue - get the remaining bytes to transfer
* @dmanr: DMA channel
*
* This function returns the number of bytes left to transfer
* on this DMA channel.
*/
static inline unsigned int mca_get_dma_residue(unsigned int dmanr)
{
unsigned short count;
outb(MCA_DMA_FN_GET_COUNT | dmanr, MCA_DMA_REG_FN);
count = 1 + inb(MCA_DMA_REG_EXE);
count += inb(MCA_DMA_REG_EXE) << 8;
return count;
}
/**
* mca_set_dma_io - set the port for an I/O transfer
* @dmanr: DMA channel
* @io_addr: an I/O port number
*
* Unlike the ISA bus DMA controllers the DMA on MCA bus can transfer
* with an I/O port target.
*/
static inline void mca_set_dma_io(unsigned int dmanr, unsigned int io_addr)
{
/*
* DMA from a port address -- set the io address
*/
outb(MCA_DMA_FN_SET_IO | dmanr, MCA_DMA_REG_FN);
outb(io_addr & 0xff, MCA_DMA_REG_EXE);
outb((io_addr >> 8) & 0xff, MCA_DMA_REG_EXE);
}
/**
* mca_set_dma_mode - set the DMA mode
* @dmanr: DMA channel
* @mode: mode to set
*
* The DMA controller supports several modes. The mode values you can
* set are-
*
* %MCA_DMA_MODE_READ when reading from the DMA device.
*
* %MCA_DMA_MODE_WRITE to writing to the DMA device.
*
* %MCA_DMA_MODE_IO to do DMA to or from an I/O port.
*
* %MCA_DMA_MODE_16 to do 16bit transfers.
*/
static inline void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)
{
outb(MCA_DMA_FN_SET_MODE | dmanr, MCA_DMA_REG_FN);
outb(mode, MCA_DMA_REG_EXE);
}
#endif /* _ASM_X86_MCA_DMA_H */
......@@ -40,7 +40,7 @@ extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
#endif /* CONFIG_X86_64 */
#if defined(CONFIG_MCA) || defined(CONFIG_EISA)
#ifdef CONFIG_EISA
extern int mp_bus_id_to_type[MAX_MP_BUSSES];
#endif
......
......@@ -84,7 +84,7 @@ struct mpc_bus {
#define BUSTYPE_EISA "EISA"
#define BUSTYPE_ISA "ISA"
#define BUSTYPE_INTERN "INTERN" /* Internal BUS */
#define BUSTYPE_MCA "MCA"
#define BUSTYPE_MCA "MCA" /* Obsolete */
#define BUSTYPE_VL "VL" /* Local bus */
#define BUSTYPE_PCI "PCI"
#define BUSTYPE_PCMCIA "PCMCIA"
......@@ -169,6 +169,5 @@ enum mp_bustype {
MP_BUS_ISA = 1,
MP_BUS_EISA,
MP_BUS_PCI,
MP_BUS_MCA,
};
#endif /* _ASM_X86_MPSPEC_DEF_H */
......@@ -49,7 +49,6 @@ obj-y += cpu/
obj-y += acpi/
obj-y += reboot.o
obj-$(CONFIG_X86_32) += reboot_32.o
obj-$(CONFIG_MCA) += mca_32.o
obj-$(CONFIG_X86_MSR) += msr.o
obj-$(CONFIG_X86_CPUID) += cpuid.o
obj-$(CONFIG_PCI) += early-quirks.o
......
......@@ -990,7 +990,7 @@ void __init mp_config_acpi_legacy_irqs(void)
int i;
struct mpc_intsrc mp_irq;
#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
#ifdef CONFIG_EISA
/*
* Fabricate the legacy ISA bus (bus #31).
*/
......
......@@ -142,7 +142,7 @@ int mp_irq_entries;
/* GSI interrupts */
static int nr_irqs_gsi = NR_IRQS_LEGACY;
#if defined (CONFIG_MCA) || defined (CONFIG_EISA)
#ifdef CONFIG_EISA
int mp_bus_id_to_type[MAX_MP_BUSSES];
#endif
......@@ -875,7 +875,7 @@ static int __init find_isa_irq_apic(int irq, int type)
return -1;
}
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
#ifdef CONFIG_EISA
/*
* EISA Edge/Level control register, ELCR
*/
......@@ -912,12 +912,6 @@ static int EISA_ELCR(unsigned int irq)
#define default_PCI_trigger(idx) (1)
#define default_PCI_polarity(idx) (1)
/* MCA interrupts are always polarity zero level triggered,
* when listed as conforming in the MP table. */
#define default_MCA_trigger(idx) (1)
#define default_MCA_polarity(idx) default_ISA_polarity(idx)
static int irq_polarity(int idx)
{
int bus = mp_irqs[idx].srcbus;
......@@ -975,7 +969,7 @@ static int irq_trigger(int idx)
trigger = default_ISA_trigger(idx);
else
trigger = default_PCI_trigger(idx);
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
#ifdef CONFIG_EISA
switch (mp_bus_id_to_type[bus]) {
case MP_BUS_ISA: /* ISA pin */
{
......@@ -992,11 +986,6 @@ static int irq_trigger(int idx)
/* set before the switch */
break;
}
case MP_BUS_MCA: /* MCA pin */
{
trigger = default_MCA_trigger(idx);
break;
}
default:
{
printk(KERN_WARNING "broken BIOS!!\n");
......
This diff is collapsed.
......@@ -97,7 +97,7 @@ static void __init MP_bus_info(struct mpc_bus *m)
set_bit(m->busid, mp_bus_not_pci);
if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
#ifdef CONFIG_EISA
mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
#endif
} else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
......@@ -105,12 +105,10 @@ static void __init MP_bus_info(struct mpc_bus *m)
x86_init.mpparse.mpc_oem_pci_bus(m);
clear_bit(m->busid, mp_bus_not_pci);
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
#ifdef CONFIG_EISA
mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
} else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
} else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
#endif
} else
printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
......@@ -368,9 +366,6 @@ static void __init construct_ioapic_table(int mpc_default_type)
case 3:
memcpy(bus.bustype, "EISA ", 6);
break;
case 4:
case 7:
memcpy(bus.bustype, "MCA ", 6);
}
MP_bus_info(&bus);
if (mpc_default_type > 4) {
......@@ -623,7 +618,7 @@ void __init default_find_smp_config(void)
return;
/*
* If it is an SMP machine we should know now, unless the
* configuration is in an EISA/MCA bus machine with an
* configuration is in an EISA bus machine with an
* extended bios data area.
*
* there is a real-mode segmented pointer pointing to the
......
......@@ -19,8 +19,6 @@
#include <linux/slab.h>
#include <linux/export.h>
#include <linux/mca.h>
#if defined(CONFIG_EDAC)
#include <linux/edac.h>
#endif
......@@ -282,16 +280,6 @@ unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
__this_cpu_add(nmi_stats.unknown, 1);
#ifdef CONFIG_MCA
/*
* Might actually be able to figure out what the guilty party
* is:
*/
if (MCA_bus) {
mca_handle_nmi();
return;
}
#endif
pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
reason, smp_processor_id());
......
......@@ -34,7 +34,6 @@
#include <linux/memblock.h>
#include <linux/seq_file.h>
#include <linux/console.h>
#include <linux/mca.h>
#include <linux/root_dev.h>
#include <linux/highmem.h>
#include <linux/module.h>
......@@ -179,12 +178,6 @@ struct cpuinfo_x86 new_cpu_data __cpuinitdata = {0, 0, 0, 0, -1, 1, 0, 0, -1};
/* common cpu data for all cpus */
struct cpuinfo_x86 boot_cpu_data __read_mostly = {0, 0, 0, 0, -1, 1, 0, 0, -1};
EXPORT_SYMBOL(boot_cpu_data);
static void set_mca_bus(