Commit a9d76f59 authored by Niklas Cassel's avatar Niklas Cassel Committed by Greg Kroah-Hartman

PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits

commit 099a95f3591ade29da52131895a3ba9f92a0e82c upstream.

Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control
register, thus overwriting the PCI_MSI_FLAGS_64BIT bit.
By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI
on systems where the RC has set a 64 bit MSI address.
Fix dw_pcie_ep_set_msi() so that it only sets MMC bits.
Tested-by: 's avatarGustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: 's avatarNiklas Cassel <niklas.cassel@axis.com>
Signed-off-by: 's avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: 's avatarJoao Pinto <jpinto@synopsys.com>
Signed-off-by: 's avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: 's avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4aac26ec
......@@ -214,7 +214,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
struct dw_pcie_ep *ep = epc_get_drvdata(epc);
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
val = (encode_int << MSI_CAP_MMC_SHIFT);
val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL);
val &= ~MSI_CAP_MMC_MASK;
val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK;
dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val);
return 0;
......
......@@ -99,6 +99,7 @@
#define MSI_MESSAGE_CONTROL 0x52
#define MSI_CAP_MMC_SHIFT 1
#define MSI_CAP_MMC_MASK (7 << MSI_CAP_MMC_SHIFT)
#define MSI_CAP_MME_SHIFT 4
#define MSI_CAP_MSI_EN_MASK 0x1
#define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT)
......
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