Commit 4fd350ee authored by Jean-Francois Moine's avatar Jean-Francois Moine Committed by Mauro Carvalho Chehab

[media] gspca - sonixj: Add the bit definitions of the bridge reg 0x01 and 0x17

Signed-off-by: default avatarJean-François Moine <moinejf@free.fr>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent b2272a49
......@@ -100,6 +100,19 @@ enum sensors {
/* device flags */
#define PDN_INV 1 /* inverse pin S_PWR_DN / sn_xxx tables */
/* sn9c1xx definitions */
/* register 0x01 */
#define S_PWR_DN 0x01 /* sensor power down */
#define S_PDN_INV 0x02 /* inverse pin S_PWR_DN */
#define V_TX_EN 0x04 /* video transfer enable */
#define LED 0x08 /* output to pin LED */
#define SCL_SEL_OD 0x20 /* open-drain mode */
#define SYS_SEL_48M 0x40 /* system clock 0: 24MHz, 1: 48MHz */
/* register 0x17 */
#define MCK_SIZE_MASK 0x1f /* sensor master clock */
#define SEN_CLK_EN 0x20 /* enable sensor clock */
#define DEF_EN 0x80 /* defect pixel by 0: soft, 1: hard */
/* V4L2 controls supported by the driver */
static void setbrightness(struct gspca_dev *gspca_dev);
static void setcontrast(struct gspca_dev *gspca_dev);
......
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