Commit b96fecbf authored by Ingo Molnar's avatar Ingo Molnar

x86/fpu: Fix boot crash in the early FPU code

Jan Kara and Thomas Gleixner reported boot crashes in the FPU

  general protection fault: 0000 [#1] SMP
  RIP: 0010:[<ffffffff81048a6c>]  [<ffffffff81048a6c>] mxcsr_feature_mask_init+0x1c/0x40

  2b:*  0f ae 85 00 fe ff ff    fxsave -0x200(%rbp)

and bisected it down to the following FPU commit:

   91a8c2a5 ("x86/fpu: Clean up and fix MXCSR handling")

The reason is that the on-stack FPU registers state variable,
used by the FXSAVE instruction, did not have the required
minimum alignment of 16 bytes, causing the general protection

This is most likely a GCC bug in older GCC versions, but the
offending commit also added a bogus extra 32-byte alignment
(which GCC ignored too).

So fix this bug by making the variable static again, but also
mark it __initdata this time, because fpu__init_system_mxcsr()
is now an __init function.
Reported-and-bisected-by: default avatarJan Kara <>
Reported-bisected-and-tested-by: default avatarThomas Gleixner <>
Cc: Andy Lutomirski <>
Cc: Borislav Petkov <>
Cc: Brian Gerst <>
Cc: Dave Hansen <>
Cc: Denys Vlasenko <>
Cc: Fenghua Yu <>
Cc: H. Peter Anvin <>
Cc: Jan Kara <>
Cc: Linus Torvalds <>
Cc: Oleg Nesterov <>
Cc: Peter Zijlstra <>
Cc: Quentin Casasnovas <>
Cc: Thomas Gleixner <>
Link: default avatarIngo Molnar <>
parent 864d5bb9
......@@ -95,11 +95,12 @@ static void __init fpu__init_system_mxcsr(void)
unsigned int mask = 0;
if (cpu_has_fxsr) {
struct fxregs_state fx_tmp __aligned(32) = { };
/* Static because GCC does not get 16-byte stack alignment right: */
static struct fxregs_state fxregs __initdata;
asm volatile("fxsave %0" : "+m" (fx_tmp));
asm volatile("fxsave %0" : "+m" (fxregs));
mask = fx_tmp.mxcsr_mask;
mask = fxregs.mxcsr_mask;
* If zero then use the default features mask,
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