Commit de3bc0e7 authored by Wu Zhangjin's avatar Wu Zhangjin Committed by Ralf Baechle

MIPS: Loongson: Oprofile: add a new do_perfcnt_IRQ()

On FuLoong-2F IP6 is shared by the performance counter overflow interrupt
and the Bonito northbridge interrupt.  To reduce overhead only call
do_IRQ() when oprofile is enabled to reduce overhead.

This patch adds an inline function do_perfcnt_IRQ() to hide the #if's ,
which can be shared by the other Loongson machines, i.e. gdium.
Signed-off-by: default avatarWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1492/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent b8c7428a
......@@ -62,6 +62,14 @@ extern int mach_i8259_irq(void);
#define LOONGSON_IRQ_BASE 32
#define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */
#include <linux/interrupt.h>
static inline void do_perfcnt_IRQ(void)
{
#if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE)
do_IRQ(LOONGSON2_PERFCNT_IRQ);
#endif
}
#define LOONGSON_FLASH_BASE 0x1c000000
#define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */
#define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
......
......@@ -30,7 +30,7 @@ asmlinkage void mach_irq_dispatch(unsigned int pending)
if (pending & CAUSEF_IP7)
do_IRQ(MIPS_CPU_IRQ_BASE + 7);
else if (pending & CAUSEF_IP6) /* perf counter loverflow */
do_IRQ(LOONGSON2_PERFCNT_IRQ);
do_perfcnt_IRQ();
else if (pending & CAUSEF_IP5)
i8259_irqdispatch();
else if (pending & CAUSEF_IP2)
......
......@@ -79,9 +79,7 @@ void mach_irq_dispatch(unsigned int pending)
if (pending & CAUSEF_IP7)
do_IRQ(LOONGSON_TIMER_IRQ);
else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */
#if defined(CONFIG_OPROFILE) || defined(CONFIG_OPROFILE_MODULE)
do_IRQ(LOONGSON2_PERFCNT_IRQ);
#endif
do_perfcnt_IRQ();
bonito_irqdispatch();
} else if (pending & CAUSEF_IP3) /* CPU UART */
do_IRQ(LOONGSON_UART_IRQ);
......
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