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    • Will Deacon's avatar
      arm64: debug: avoid accessing mdscr_el1 on fault paths where possible · 2a283070
      Will Deacon authored
      Since mdscr_el1 is part of the debug register group, it is highly likely
      to be trapped by a hypervisor to prevent virtual machines from debugging
      (buggering?) each other. Unfortunately, this absolutely destroys our
      performance, since we access the register on many of our low-level
      fault handling paths to keep track of the various debug state machines.
      This patch removes our dependency on mdscr_el1 in the case that debugging
      is not being used. More specifically we:
        - Use TIF_SINGLESTEP to indicate that a task is stepping at EL0 and
          avoid disabling step in the MDSCR when we don't need to.
          MDSCR_EL1.SS handling is moved to kernel_entry, when trapping from
        - Ensure debug exceptions are re-enabled on *all* exception entry
          paths, even the debug exception handling path (where we re-enable
          exceptions after invoking the handler). Since we can now rely on
          MDSCR_EL1.SS being cleared by the entry code, exception handlers can
          usually enable debug immediately before enabling interrupts.
        - Remove all debug exception unmasking from ret_to_user and
          el1_preempt, since we will never get here with debug exceptions
      This results in a slight change to kernel debug behaviour, where we now
      step into interrupt handlers and data aborts from EL1 when debugging the
      kernel, which is actually a useful thing to do. A side-effect of this is
      that it *does* potentially prevent stepping off {break,watch}points when
      there is a high-frequency interrupt source (e.g. a timer), so a debugger
      would need to use either breakpoints or manually disable interrupts to
      get around this issue.
      With this patch applied, guest performance is restored under KVM when
      debug register accesses are trapped (and we get a measurable performance
      increase on the host on Cortex-A57 too).
      Cc: Ian Campbell <ian.campbell@citrix.com>
      Tested-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
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