Commit 12250d84 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux

Pull i2c-embedded changes from Wolfram Sang:
 "The changes for i2c-embedded include:

   - massive rework of the omap driver
   - massive rework of the at91 driver.  In fact, the old driver gets
     removed; I am okay with this approach since the old driver was
     depending on BROKEN and its limitations made it practically
     unusable, so people used bitbanging instead.  But even if there are
     users, there is no platform_data or module parameter which would
     need to be converted.  It is just another driver doing I2C
     transfers, just way better.  Modifications of arch/arm/at91 related
     files have proper acks from the maintainer.
   - new driver for R-Car I2C
   - devicetree and generic_clock conversions and fixes
   - usual driver fixes and changes.

  The rework patches have come a long way and lots of people have been
  involved in creating/testing them.  Most patches have been in
  linux-next at least since 3.6-rc5.  A few have been added in the last
  week, I have to admit.

  An unexpected (but welcome :)) peak in private life is the cause for
  that.  The "late" patches shouldn't cause any merge conflicts and I
  will have a special eye on them during the stabilization phase.  This
  is an exception and I want to have the patches in place properly in
  time again for the next kernels."

* 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (44 commits)
  MXS: Implement DMA support into mxs-i2c
  i2c: add Renesas R-Car I2C driver
  i2c: s3c2410: use clk_prepare_enable and clk_disable_unprepare
  ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints
  i2c: nomadik: Add Device Tree support to the Nomadik I2C driver
  i2c: algo: pca: Fix chip reset function for PCA9665
  i2c: mpc: Wait for STOP to hit the bus
  i2c: davinci: preparation for switch to common clock framework
  omap-i2c: fix incorrect log message when using a device tree
  i2c: omap: sanitize exit path
  i2c: omap: switch over to autosuspend API
  i2c: omap: remove unnecessary pm_runtime_suspended check
  i2c: omap: switch to threaded IRQ support
  i2c: omap: remove redundant status read
  i2c: omap: get rid of the "complete" label
  i2c: omap: resize fifos before each message
  i2c: omap: simplify IRQ exit path
  i2c: omap: always return IRQ_HANDLED
  i2c: omap: simplify errata check
  i2c: omap: bus: add a receiver flag
  ...
parents da06a8d7 62885f59
I2C for Atmel platforms
Required properties :
- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
"atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c"
or "atmel,at91sam9x5-i2c"
- reg: physical base address of the controller and length of memory mapped
region.
- interrupts: interrupt number to the cpu.
- #address-cells = <1>;
- #size-cells = <0>;
Optional properties:
- Child nodes conforming to i2c bus binding
Examples :
i2c0: i2c@fff84000 {
compatible = "atmel,at91sam9g20-i2c";
reg = <0xfff84000 0x100>;
interrupts = <12 4 6>;
#address-cells = <1>;
#size-cells = <0>;
24c512@50 {
compatible = "24c512";
reg = <0x50>;
pagesize = <128>;
}
}
* Texas Instruments Davinci I2C
This file provides information, what the device node for the
davinci i2c interface contain.
Required properties:
- compatible: "ti,davinci-i2c";
- reg : Offset and length of the register set for the device
Recommended properties :
- interrupts : standard interrupt property.
- clock-frequency : desired I2C bus clock frequency in Hz.
Example (enbw_cmc board):
i2c@1c22000 {
compatible = "ti,davinci-i2c";
reg = <0x22000 0x1000>;
clock-frequency = <100000>;
interrupts = <15>;
interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <0>;
dtt@48 {
compatible = "national,lm75";
reg = <0x48>;
};
};
......@@ -6,6 +6,7 @@ Required properties:
- interrupts: Should contain ERROR and DMA interrupts
- clock-frequency: Desired I2C bus clock frequency in Hz.
Only 100000Hz and 400000Hz modes are supported.
- fsl,i2c-dma-channel: APBX DMA channel for the I2C
Examples:
......@@ -16,4 +17,5 @@ i2c0: i2c@80058000 {
reg = <0x80058000 2000>;
interrupts = <111 68>;
clock-frequency = <100000>;
fsl,i2c-dma-channel = <6>;
};
I2C for Nomadik based systems
Required (non-standard) properties:
- Nil
Recommended (non-standard) properties:
- clock-frequency : Maximum bus clock frequency for the device
Optional (non-standard) properties:
- Nil
Example :
i2c@80004000 {
compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
reg = <0x80004000 0x1000>;
interrupts = <0 21 0x4>;
#address-cells = <1>;
#size-cells = <0>;
v-i2c-supply = <&db8500_vape_reg>;
clock-frequency = <400000>;
};
......@@ -28,6 +28,7 @@
gpio2 = &pioC;
tcb0 = &tcb0;
tcb1 = &tcb1;
i2c0 = &i2c0;
};
cpus {
cpu@0 {
......@@ -202,6 +203,15 @@
status = "disabled";
};
i2c0: i2c@fffac000 {
compatible = "atmel,at91sam9260-i2c";
reg = <0xfffac000 0x100>;
interrupts = <11 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
adc0: adc@fffe0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
......
......@@ -24,6 +24,7 @@
gpio3 = &pioD;
gpio4 = &pioE;
tcb0 = &tcb0;
i2c0 = &i2c0;
};
cpus {
cpu@0 {
......@@ -185,6 +186,15 @@
interrupts = <24 4 2>;
status = "disabled";
};
i2c0: i2c@fff88000 {
compatible = "atmel,at91sam9263-i2c";
reg = <0xfff88000 0x100>;
interrupts = <13 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
nand0: nand@40000000 {
......
......@@ -18,6 +18,10 @@
ahb {
apb {
i2c0: i2c@fffac000 {
compatible = "atmel,at91sam9g20-i2c";
};
adc0: adc@fffe0000 {
atmel,adc-startup-time = <40>;
};
......
......@@ -32,6 +32,18 @@
phy-mode = "rmii";
status = "okay";
};
i2c0: i2c@f8010000 {
status = "okay";
};
i2c1: i2c@f8014000 {
status = "okay";
};
i2c2: i2c@f8018000 {
status = "okay";
};
};
usb0: ohci@00600000 {
......
......@@ -29,6 +29,8 @@
gpio4 = &pioE;
tcb0 = &tcb0;
tcb1 = &tcb1;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
cpus {
cpu@0 {
......@@ -206,6 +208,24 @@
status = "disabled";
};
i2c0: i2c@fff84000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff84000 0x100>;
interrupts = <12 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@fff88000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff88000 0x100>;
interrupts = <13 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
adc0: adc@fffb0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffb0000 0x100>;
......
......@@ -46,6 +46,14 @@
phy-mode = "rmii";
status = "okay";
};
i2c0: i2c@fff84000 {
status = "okay";
};
i2c1: i2c@fff88000 {
status = "okay";
};
};
nand0: nand@40000000 {
......
......@@ -26,6 +26,8 @@
gpio3 = &pioD;
tcb0 = &tcb0;
tcb1 = &tcb1;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
cpus {
cpu@0 {
......@@ -182,6 +184,24 @@
atmel,use-dma-tx;
status = "disabled";
};
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
interrupts = <9 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
interrupts = <10 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
};
nand0: nand@40000000 {
......
......@@ -37,6 +37,14 @@
dbgu: serial@fffff200 {
status = "okay";
};
i2c0: i2c@f8010000 {
status = "okay";
};
i2c1: i2c@f8014000 {
status = "okay";
};
};
nand0: nand@40000000 {
......
......@@ -27,6 +27,9 @@
gpio3 = &pioD;
tcb0 = &tcb0;
tcb1 = &tcb1;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
};
cpus {
cpu@0 {
......@@ -196,6 +199,33 @@
status = "disabled";
};
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
interrupts = <9 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
interrupts = <10 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@f8018000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8018000 0x100>;
interrupts = <11 4 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
adc0: adc@f804c000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf804c000 0x100>;
......
......@@ -764,6 +764,7 @@
reg = <0x80058000 0x2000>;
interrupts = <111 68>;
clock-frequency = <100000>;
fsl,i2c-dma-channel = <6>;
status = "disabled";
};
......@@ -774,6 +775,7 @@
reg = <0x8005a000 0x2000>;
interrupts = <110 69>;
clock-frequency = <100000>;
fsl,i2c-dma-channel = <7>;
status = "disabled";
};
......
......@@ -187,6 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
......
......@@ -511,7 +511,7 @@ static struct resource twi_resources[] = {
};
static struct platform_device at91rm9200_twi_device = {
.name = "at91_i2c",
.name = "i2c-at91rm9200",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
......
......@@ -211,6 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk),
/* more usart lookup table for DT entries */
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
......@@ -219,6 +221,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
/* more tc lookup table for DT entries */
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
......
......@@ -421,7 +421,6 @@ static struct resource twi_resources[] = {
};
static struct platform_device at91sam9260_twi_device = {
.name = "at91_i2c",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
......@@ -429,6 +428,13 @@ static struct platform_device at91sam9260_twi_device = {
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
{
/* IP version is not the same on 9260 and g20 */
if (cpu_is_at91sam9g20()) {
at91sam9260_twi_device.name = "i2c-at91sam9g20";
} else {
at91sam9260_twi_device.name = "i2c-at91sam9260";
}
/* pins used for TWI interface */
at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA23, 1);
......
......@@ -178,6 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
......
......@@ -317,7 +317,6 @@ static struct resource twi_resources[] = {
};
static struct platform_device at91sam9261_twi_device = {
.name = "at91_i2c",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
......@@ -325,12 +324,19 @@ static struct platform_device at91sam9261_twi_device = {
void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
{
/* IP version is not the same on 9261 and g10 */
if (cpu_is_at91sam9g10()) {
at91sam9261_twi_device.name = "i2c-at91sam9g10";
/* I2C PIO must not be configured as open-drain on this chip */
} else {
at91sam9261_twi_device.name = "i2c-at91sam9261";
at91_set_multi_drive(AT91_PIN_PA7, 1);
at91_set_multi_drive(AT91_PIN_PA8, 1);
}
/* pins used for TWI interface */
at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA7, 1);
at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PA8, 1);
i2c_register_board_info(0, devices, nr_devices);
platform_device_register(&at91sam9261_twi_device);
......
......@@ -193,6 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
......@@ -210,6 +211,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
......
......@@ -599,7 +599,7 @@ static struct resource twi_resources[] = {
};
static struct platform_device at91sam9263_twi_device = {
.name = "at91_i2c",
.name = "i2c-at91sam9260",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
......
......@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.1", &twi1_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk),
......@@ -254,6 +256,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
/* fake hclk clock */
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
......
......@@ -653,7 +653,7 @@ static struct resource twi0_resources[] = {
};
static struct platform_device at91sam9g45_twi0_device = {
.name = "at91_i2c",
.name = "i2c-at91sam9g10",
.id = 0,
.resource = twi0_resources,
.num_resources = ARRAY_SIZE(twi0_resources),
......@@ -673,7 +673,7 @@ static struct resource twi1_resources[] = {
};
static struct platform_device at91sam9g45_twi1_device = {
.name = "at91_i2c",
.name = "i2c-at91sam9g10",
.id = 1,
.resource = twi1_resources,
.num_resources = ARRAY_SIZE(twi1_resources),
......@@ -686,18 +686,12 @@ void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, in
/* pins used for TWI interface */
if (i2c_id == 0) {
at91_set_A_periph(AT91_PIN_PA20, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PA20, 1);
at91_set_A_periph(AT91_PIN_PA21, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PA21, 1);
platform_device_register(&at91sam9g45_twi0_device);
} else {
at91_set_A_periph(AT91_PIN_PB10, 0); /* TWD */
at91_set_multi_drive(AT91_PIN_PB10, 1);
at91_set_A_periph(AT91_PIN_PB11, 0); /* TWCK */
at91_set_multi_drive(AT91_PIN_PB11, 1);
platform_device_register(&at91sam9g45_twi1_device);
}
......
......@@ -169,6 +169,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
CLKDEV_CON_ID("pioA", &pioAB_clk),
CLKDEV_CON_ID("pioB", &pioAB_clk),
CLKDEV_CON_ID("pioC", &pioCD_clk),
......
......@@ -186,6 +186,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.1", &twi1_clk),
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
......
......@@ -346,7 +346,7 @@ static struct resource twi_resources[] = {
};
static struct platform_device at91sam9rl_twi_device = {
.name = "at91_i2c",
.name = "i2c-at91sam9g20",
.id = -1,
.resource = twi_resources,
.num_resources = ARRAY_SIZE(twi_resources),
......
......@@ -231,6 +231,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
CLKDEV_CON_ID("pioA", &pioAB_clk),
CLKDEV_CON_ID("pioB", &pioAB_clk),
CLKDEV_CON_ID("pioC", &pioCD_clk),
......
/*
* arch/arm/mach-at91/include/mach/at91_twi.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* Two-wire Interface (TWI) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91_TWI_H
#define AT91_TWI_H
#define AT91_TWI_CR 0x00 /* Control Register */
#define AT91_TWI_START (1 << 0) /* Send a Start Condition */
#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */
#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */
#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */
#define AT91_TWI_SVEN (1 << 4) /* Slave Transfer Enable [SAM9260 only] */
#define AT91_TWI_SVDIS (1 << 5) /* Slave Transfer Disable [SAM9260 only] */
#define AT91_TWI_SWRST (1 << 7) /* Software Reset */
#define AT91_TWI_MMR 0x04 /* Master Mode Register */
#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */
#define AT91_TWI_IADRSZ_NO (0 << 8)
#define AT91_TWI_IADRSZ_1 (1 << 8)
#define AT91_TWI_IADRSZ_2 (2 << 8)
#define AT91_TWI_IADRSZ_3 (3 << 8)
#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */
#define AT91_TWI_DADR (0x7f << 16) /* Device Address */
#define AT91_TWI_SMR 0x08 /* Slave Mode Register [SAM9260 only] */
#define AT91_TWI_SADR (0x7f << 16) /* Slave Address */
#define AT91_TWI_IADR 0x0c /* Internal Address Register */
#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */
#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */
#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */
#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */
#define AT91_TWI_SR 0x20 /* Status Register */
#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */
#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */
#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */
#define AT91_TWI_SVREAD (1 << 3) /* Slave Read [SAM9260 only] */
#define AT91_TWI_SVACC (1 << 4) /* Slave Access [SAM9260 only] */
#define AT91_TWI_GACC (1 << 5) /* General Call Access [SAM9260 only] */
#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */
#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */
#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */
#define AT91_TWI_ARBLST (1 << 9) /* Arbitration Lost [SAM9260 only] */
#define AT91_TWI_SCLWS (1 << 10) /* Clock Wait State [SAM9260 only] */
#define AT91_TWI_EOSACC (1 << 11) /* End of Slave Address [SAM9260 only] */
#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */
#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */
#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */
#define AT91_TWI_RHR 0x30 /* Receive Holding Register */
#define AT91_TWI_THR 0x34 /* Transmit Holding Register */
#endif
......@@ -26,14 +26,12 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/i2c-omap.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <mach/irqs.h>
#include <plat/i2c.h>
#include <plat/omap-pm.h>
#include <plat/omap_device.h>
#define OMAP_I2C_SIZE 0x3f
......@@ -129,16 +127,6 @@ static inline int omap1_i2c_add_bus(int bus_id)
#ifdef CONFIG_ARCH_OMAP2PLUS
/*
* XXX This function is a temporary compatibility wrapper - only
* needed until the I2C driver can be converted to call
* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
*/
static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
{
omap_pm_set_max_mpu_wakeup_lat(dev, t);
}
static inline int omap2_i2c_add_bus(int bus_id)
{
int l;
......@@ -170,15 +158,6 @@ static inline int omap2_i2c_add_bus(int bus_id)
dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
pdata->flags = dev_attr->flags;
/*
* When waiting for completion of a i2c transfer, we need to
* set a wake up latency constraint for the MPU. This is to
* ensure quick enough wakeup from idle, when transfer
* completes.
* Only omap3 has support for constraints
*/
if (cpu_is_omap34xx())
pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
pdev = omap_device_build(name, bus_id, oh, pdata,
sizeof(struct omap_i2c_bus_platform_data),
NULL, 0, 0);
......
......@@ -46,14 +46,19 @@ static int i2c_debug;
#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
#define pca_wait(adap) adap->wait_for_completion(adap->data)
#define pca_reset(adap) adap->reset_chip(adap->data)
static void pca9665_reset(void *pd)
static void pca_reset(struct i2c_algo_pca_data *adap)
{
struct i2c_algo_pca_data *adap = pd;
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
pca_outw(adap, I2C_PCA_IND, 0xA5);
pca_outw(adap, I2C_PCA_IND, 0x5A);
if (adap->chip == I2C_PCA_CHIP_9665) {
/* Ignore the reset function from the module,
* we can use the parallel bus reset.
*/
pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
pca_outw(adap, I2C_PCA_IND, 0xA5);
pca_outw(adap, I2C_PCA_IND, 0x5A);
} else {
adap->reset_chip(adap->data);
}
}
/*
......@@ -378,11 +383,12 @@ static unsigned int pca_probe_chip(struct i2c_adapter *adap)
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
return I2C_PCA_CHIP_9665;
pca_data->chip = I2C_PCA_CHIP_9665;
} else {
printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
return I2C_PCA_CHIP_9564;
pca_data->chip = I2C_PCA_CHIP_9564;
}
return pca_data->chip;
}
static int pca_init(struct i2c_adapter *adap)
......@@ -456,11 +462,6 @@ static int pca_init(struct i2c_adapter *adap)