1. 10 Oct, 2016 1 commit
  2. 08 Sep, 2016 1 commit
  3. 18 Aug, 2016 1 commit
  4. 17 Aug, 2016 1 commit
    • Pawel Moll's avatar
      bus: arm-ccn: Correct required arguments for XP PMU events · 90d11e26
      Pawel Moll authored
      XP can provide events from two sources: watchpoints, observing traffic
      on device ports and PMU looking at internal buses.
      
      Unfortunately the sysfs definition of the PMU events was requiring
      port number (instead of bus number) and direction (the buses are
      unidirectional), as these fields were shared with the watchpoint event.
      
      Although it does not introduce a major problem (port can be used as
      bus alias and direction is simply ignored for XP PMU events), it's
      better to fix it now, before external tools start depending on this
      behaviour.
      Signed-off-by: 's avatarPawel Moll <pawel.moll@arm.com>
      90d11e26
  5. 21 Jun, 2016 1 commit
  6. 28 Apr, 2016 1 commit
  7. 19 Feb, 2016 4 commits
  8. 17 Feb, 2016 2 commits
  9. 05 Feb, 2016 1 commit
  10. 10 Dec, 2015 1 commit
  11. 01 Dec, 2015 1 commit
  12. 23 Nov, 2015 1 commit
    • Murali Karicheri's avatar
      ARM: dts: keystone: k2l: fix kernel crash when clk_ignore_unused is not in bootargs · 17e846aa
      Murali Karicheri authored
      Currently kernel crash randomly when K2L EVM is booted without
      clk_ignore_unused in the bootargs. This workaround is not needed
      on other K2 devices such as K2HK and K2E and with this fix, we can
      remove the workaround altogether. netcp driver on K2L uses linked
      ram on OSR (On chip Static RAM) and requires the clock to this peripheral
      enabled for proper functioning. This is the reason for the kernel crash.
      So add the clock node to fix this issue.
      
      While at it, remove the workaround documentation as well.
      
      With the fix applied, clk_summary dump shows the clock to OSR enabled.
      
      cat /sys/kernel/debug/clk/clk_summary
       ------cut--------------
         tcp3d-1                   0            0   399360000          0 0
         tcp3d-0                   0            0   399360000          0 0
         osr                       1            1   399360000          0 0
         fftc-0                    0            0   399360000          0 0
       -----cut----------------
      Signed-off-by: 's avatarMurali Karicheri <m-karicheri2@ti.com>
      Signed-off-by: 's avatarSantosh Shilimkar <ssantosh@kernel.org>
      17e846aa
  13. 20 Nov, 2015 3 commits
  14. 23 Oct, 2015 1 commit
    • Krzysztof Kozlowski's avatar
      Documentation: EXYNOS: Update bootloader interface on exynos542x · 97d5c7a7
      Krzysztof Kozlowski authored
      Update the documentation about:
      1. Usage of PMU_SPARE2 register.
         Bootloaders on Exynos542x-based boards often use the register
         PMU_SPARE2 (0x908) in the same way as on Exynos3250: as a indicator
         the secondary CPU was booted on. The bootloader will set this value
         to non-zero, after sucessfull power up of secondary CPU. In the same
         time this booted CPU will stuck (spin) waiting for software reset.
      2. Exynos542x entry address for secondary CPU boot up after system
         suspend (with MCPM enabled and in non-secure mode).
      
      See arch/arm/mach-exynos/mcpm-exynos.c for source code.
      Signed-off-by: 's avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
      Signed-off-by: 's avatarKukjin Kim <kgene@kernel.org>
      97d5c7a7
  15. 17 Oct, 2015 1 commit
  16. 13 Oct, 2015 3 commits
  17. 12 Oct, 2015 3 commits
  18. 09 Oct, 2015 1 commit
  19. 22 Sep, 2015 1 commit
    • Nicolas Pitre's avatar
      ARM: 8432/1: move VMALLOC_END from 0xff000000 to 0xff800000 · 6ff09660
      Nicolas Pitre authored
      There is a 12MB unused region in our memory map between the vmalloc and
      fixmap areas. This became unused with commit e9da6e99, confirmed
      with commit 64d3b6a3.
      
      We also have a 8MB guard area before the vmalloc area.  With the default
      240MB vmalloc area size and the current VMALLOC_END definition, that
      means the end of low memory ends up at 0xef800000 which is unfortunate
      for 768MB machines where 8MB of RAM is lost to himem.
      
      Let's move VMALLOC_END to 0xff800000 so the guard area won't chop the
      top of the 768MB low memory area while keeping the default vmalloc area
      size unchanged and still preserving a gap between the vmalloc and fixmap
      areas.
      Signed-off-by: 's avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: 's avatarRussell King <rmk+kernel@arm.linux.org.uk>
      6ff09660
  20. 06 Aug, 2015 1 commit
  21. 05 Aug, 2015 1 commit
  22. 17 Jul, 2015 1 commit
  23. 10 Jul, 2015 1 commit
  24. 05 Jul, 2015 1 commit
  25. 22 Jun, 2015 1 commit
  26. 08 Jun, 2015 1 commit
  27. 15 May, 2015 1 commit
  28. 01 May, 2015 2 commits
    • Pawel Moll's avatar
      bus: arm-ccn: Provide required event arguments · 8f06c51f
      Pawel Moll authored
      Since 688d4dfc "perf tools: Support
      parsing parameterized events" the perf userspace tools understands
      "argument=?" syntax in the events file, making sure that required
      arguments are provided by the user and not defaulting to 0, causing
      confusion.
      
      This patch adds the required arguments lists for CCN events.
      Signed-off-by: 's avatarPawel Moll <pawel.moll@arm.com>
      8f06c51f
    • Pawel Moll's avatar
      bus: arm-ccn: cpumask attribute · ffa41524
      Pawel Moll authored
      This patch adds a "cpumask" attribute to CCN's event_source class sysfs
      directory. Perf user tool uses it to restrict events to the
      processor(s) enumerated in this mask.
      
      This patch provides a single CPU mask, making it possible to run "-a"
      perf session (previously it would request the same CCN event, for
      example cycle counter, on each available core and most likely fail).
      Initially the mask is set to the CPU that happened to probe the driver,
      but it will be changed when it is hot-un-plugged (active events are
      migrated to another CPU then).
      
      Example:
      
       Performance counter stats for 'system wide':
      
      CPU0               2968148      cycles
      CPU1               2236736      cycles
      CPU2               1797968      cycles
      CPU3               1831715      cycles
      CPU1            1201850868      ccn/cycles/
      
             1.001241383 seconds time elapsed
      Signed-off-by: 's avatarPawel Moll <pawel.moll@arm.com>
      ffa41524
  29. 27 Mar, 2015 1 commit