Philippe Gerum authored Sep 23, 2018 and Jan Kiszka committed Sep 24, 2018

Usable with latest Flexcan controller revisions available from recent
i.MX series. The older driver would break when initializing the chip
(FIFO activation), e.g.:

[  957.052272] rtcan0: real bitrate 1000000, sampling point 75.0%
[  957.058325] rtcan0: writing ctrl=0x011a2003
[  957.062670] rtcan0: flexcan_set_bit_time: mcr=0x5980000f ctrl=0x011a2003
[  957.069403] rtcan0: flexcan_chip_start: writing mcr=0x79a2020f
[  957.069421] rtcan0: flexcan_chip_start: writing ctrl=0x011aac53
[  957.075359] Unhandled fault: imprecise external abort (0x1c06) at 0xaec71a2c
[  957.088371] pgd = cae8c000
[  957.091106] [aec71a2c] *pgd=9d843835, *pte=ba49d75f, *ppte=ba49dc7f
[  957.097447] Internal error: : 1c06 [#1] SMP ARM
[  957.108324] CPU: 1 PID: 843 Comm: rtcanconfig Not tainted 4.14.34 #1
[  957.115391] Hardware name: Freescale i.MX7 Dual (Device Tree)
[  957.121155] I-pipe domain: Linux
[  957.124404] task: caee1900 task.stack: ca5d0000
[  957.128968] PC is at flexcan_chip_start+0x180/0x34c
[  957.133869] LR is at flexcan_chip_start+0x178/0x34c

As a bonus, the latest work arounds addressing silicon bugs are now
included (e.g. use of timestamp-based offloading when the FIFO
ordering does not match the time of arrival).

Signed-off-by: Philippe Gerum <rpm@xenomai.org>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>