Commit 7c7a23bd authored by wdenk's avatar wdenk

* Patch by Hans-Joerg Frieden, 06 Dec 2002

  Fix misc problems with AmigaOne support

* Patch by Chris Hallinan, 3 Dec 2002:
  minor cleanup to the MPC8245 EPIC driver

* Patch by Pierre Aubert , 28 Nov 2002
  Add support for external (SIU) interrupts on MPC8xx

* Patch by Pierre Aubert , 28 Nov 2002
  Fix nested syscalls bug in standalone applications

* Patch by David Mller, 27 Nov 2002:
  fix output of "pciinfo" command for CardBus bridge devices.

* Fix bug in TQM8260 board detection - boards got stuck when board ID
  was not readable
parent 1f53a416
......@@ -2,6 +2,24 @@
Changes since for U-Boot 0.1.0:
======================================================================
* Patch by Hans-Joerg Frieden, 06 Dec 2002
Fix misc problems with AmigaOne support
* Patch by Chris Hallinan, 3 Dec 2002:
minor cleanup to the MPC8245 EPIC driver
* Patch by Pierre Aubert , 28 Nov 2002
Add support for external (SIU) interrupts on MPC8xx
* Patch by Pierre Aubert , 28 Nov 2002
Fix nested syscalls bug in standalone applications
* Patch by David Mller, 27 Nov 2002:
fix output of "pciinfo" command for CardBus bridge devices.
* Fix bug in TQM8260 board detection - boards got stuck when board ID
was not readable
* Add LED indication for IDE activity on KUP4K board
* Fix startup problems with VFD display on TRAB
......
......@@ -76,9 +76,8 @@ __asm(" .globl send_kb \n
int checkboard (void)
{
printf ("AmigaOneG3SE\n");
return 1;
printf ("Board: AmigaOneG3SE\n");
return 0;
}
long initdram (int board_type)
......@@ -88,9 +87,9 @@ long initdram (int board_type)
void after_reloc (ulong dest_addr)
void after_reloc (ulong dest_addr, gd_t *gd)
{
DECLARE_GLOBAL_DATA_PTR;
/* HJF: DECLARE_GLOBAL_DATA_PTR; */
board_init_r (gd, dest_addr);
}
......
......@@ -35,13 +35,16 @@ AOBJS = board_asm_init.o memio.o
OBJS = $(COBJS) $(AOBJS)
## FIXME !!!
# EMUOBJS = ../bios_emulator/scitech/src/x86emu/*.o
EMUDIR = ../bios_emulator/scitech/src/x86emu/
EMUOBJ = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \
$(EMUDIR)ops.o $(EMUDIR)sys.o
EMUSRC = $(EMUOBJ:.o=.c)
$(LIB): .depend $(OBJS) $(EMUOBJS)
$(LIB): .depend $(OBJS) $(EMUSRC)
make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE)
-rm $(LIB)
$(AR) crv $@ $(OBJS) $(EMUOBJS)
$(AR) crv $@ $(OBJS) $(EMUOBJ)
#########################################################################
......
......@@ -82,8 +82,9 @@ static inline unsigned short NSto10PS (unsigned char spd_byte)
long detect_sdram (uint8 * rom, int dimmNum, struct dimm_bank *banks)
{
DECLARE_GLOBAL_DATA_PTR;
int dimm_address = (dimmNum == 0) ? SM_DIMM0_ADDR : SM_DIMM1_ADDR;
uint32 busclock = get_bus_freq (0);
uint32 busclock = gd->bus_clk;
uint32 memclock = busclock;
uint32 tmemclock = 1000000000 / (memclock / 100);
uint32 datawidth;
......@@ -404,7 +405,7 @@ long articiaS_ram_init (void)
uint32 total_ram = 0;
struct dimm_bank banks[4]; /* FIXME: Move to initram */
uint32 busclock = get_bus_freq (0);
uint32 busclock = gd->bus_clk;
uint32 memclock = busclock;
uint32 reg32;
uint32 refresh_clocks;
......
......@@ -26,7 +26,7 @@
#include "memio.h"
#include "articiaS.h"
//#define ARTICIA_PCI_DEBUG
#undef ARTICIA_PCI_DEBUG
#ifdef ARTICIA_PCI_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
......@@ -512,7 +512,11 @@ int articiaS_init_vga (void)
PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr);
/* Find the first of this class on this bus */
dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0);
if (dev != ~0) break;
if (dev != ~0)
{
PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
break;
}
busnr++;
if (busnr > articiaS_hose.last_busno)
{
......@@ -552,7 +556,7 @@ int articiaS_init_vga (void)
/*
* Now try to run the bios
*/
PRINTF("Trying to run bios now\n");
if (execute_bios(dev, gd->relocaddr))
{
printf("OK\n");
......
......@@ -29,5 +29,5 @@ X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) #-DDEBUG
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG
......@@ -474,13 +474,13 @@ void video_easteregg(void)
}
#endif
extern bd_t *bd_global;
extern block_dev_desc_t * ide_get_dev(int dev);
extern char version_string[];
void video_banner(void)
{
block_dev_desc_t *ide;
DECLARE_GLOBAL_DATA_PTR;
int i;
char *s;
int maxdev;
......@@ -513,8 +513,8 @@ void video_banner(void)
video_clear();
printf("%s\n\nCPU: ", version_string);
checkcpu();
printf("DRAM: %ld MB\n", bd_global->bi_memsize/(1024*1024));
printf("FSB: %ld MHz\n", bd_global->bi_busfreq/1000000);
printf("DRAM: %ld MB\n", gd->bd->bi_memsize/(1024*1024));
printf("FSB: %ld MHz\n", gd->bd->bi_busfreq/1000000);
printf("\n---- Disk summary ----\n");
for (i = 0; i < maxdev; i++)
......
......@@ -271,9 +271,9 @@ int attempt_map_rom(pci_dev_t dev, void *copy_address)
pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
pci_write_config_dword(dev, i, bar_backup);
/* FIXME: */
bat_map(2, 0x80000000, 256*1024*1024);
show_bat_mapping();
/* FIXME: Shouldn't be needed anymore*/
/* bat_map(2, 0x80000000, 256*1024*1024);
show_bat_mapping(); */
/*
* Since most cards can probably only do 16 bit IO addressing, we
......@@ -436,7 +436,6 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
void show_bat_mapping(void)
{
#ifdef DEBUG
u32 dbat0u, dbat0l, ibat0u, ibat0l;
u32 dbat1u, dbat1l, ibat1u, ibat1l;
u32 dbat2u, dbat2l, ibat2u, ibat2l;
......@@ -477,7 +476,6 @@ void show_bat_mapping(void)
dbat3u, dbat3l, ibat3u, ibat3l);
printf("\nMSR: %08x HID0: %08x L2CR: %08x \n", msr,hid0, l2cr_reg);
#endif
}
......@@ -485,44 +483,34 @@ void show_bat_mapping(void)
void remove_init_data(void)
{
char *s;
u32 batl = ((CFG_SDRAM_BASE+0x100000) | BATL_PP_RW);
u32 batu =((CFG_SDRAM_BASE+0x100000) | BATU_BL_256M | BATU_VS | BATU_VP);
#if 0 /* already done in board_init_r() */
void *data = (void *)(CFG_INIT_RAM_ADDR+CFG_INIT_DATA_OFFSET);
unsigned char data2[CFG_INIT_DATA_SIZE];
/* Make a copy of the data */
memcpy(data2, data, CFG_INIT_DATA_SIZE);
#endif /* 0 */
/* Invalidate and disable data cache */
invalidate_l1_data_cache();
dcache_disable();
#if 0
/* Copy to the real RAM address */
memcpy(data, data2, CFG_INIT_DATA_SIZE);
#endif
/*printf("Before ICache enable\n");
show_bat_mapping();*/
__asm volatile ("isync \n"
"mtdbatu 2,%2 \n"
"mtdbatl 2,%2 \n"
"mtdbatu 1,%0 \n"
"mtdbatl 1,%1 \n"
"sync \n"
"isync \n"
: : "r" (batu), "r" (batl), "r" (0));
/* show_bat_mapping(); */
s = getenv("x86_cache");
if (!s || (s && strcmp(s, "on")==0))
if (!s)
{
icache_enable();
dcache_enable();
}
else if (s)
{
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
}
/* show_bat_mapping();*/
}
#############################################################################
#
# Realmode X86 Emulator Library
#
# Copyright (C) 1996-1999 SciTech Software, Inc.
#
# ========================================================================
#
# Permission to use, copy, modify, distribute, and sell this software and
# its documentation for any purpose is hereby granted without fee,
# provided that the above copyright notice appear in all copies and that
# both that copyright notice and this permission notice appear in
# supporting documentation, and that the name of the authors not be used
# in advertising or publicity pertaining to distribution of the software
# without specific, written prior permission. The authors makes no
# representations about the suitability of this software for any purpose.
# It is provided "as is" without express or implied warranty.
#
# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
# PERFORMANCE OF THIS SOFTWARE.
#
# ========================================================================
#
# Descripton: Linux specific makefile for the x86emu library.
#
#############################################################################
CC = $(CROSS_COMPILE)gcc
AR = $(CROSS_COMPILE)ar
TARGETLIB = libx86emu.a
TARGETDEBUGLIB =libx86emud.a
OBJS=\
decode.o \
fpu.o \
ops.o \
ops2.o \
prim_ops.o \
sys.o
DEBUGOBJS=debug.d \
decode.d \
fpu.d \
ops.d \
ops2.d \
prim_ops.d \
sys.d
.SUFFIXES: .d
all: $(TARGETLIB) $(TARGETDEBUGLIB)
$(TARGETLIB): $(OBJS)
$(AR) rv $(TARGETLIB) $(OBJS)
$(TARGETDEBUGLIB): $(DEBUGOBJS)
$(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
INCS = -I. -Ix86emu -I../../include
CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char -fomit-frame-pointer -mrelocatable -ffixed-r14 -meabi -mrelocatable -ffixed-r14 -meabi
CDEBUGFLAGS = -DDEBUG
.c.o:
$(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
.c.d:
$(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
.cpp.o:
$(CC) -c $(CFLAGS) $(INCS) $*.cpp
clean:
rm -f *.a *.o *.d
validate: validate.o libx86emu.a
$(CC) -o validate validate.o -lx86emu -L.
......@@ -398,9 +398,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
u8 cfg;
int i;
char c;
#ifdef DEBUG
char *s;
#endif
#ifdef EASTEREGG
int easteregg_active = 0;
#endif
......@@ -409,6 +407,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
unsigned char *msg;
unsigned char current_attr;
PRINTF("Trying to remove init data\n");
remove_init_data();
PRINTF("Removed init data from cache, now in RAM\n");
......@@ -438,7 +437,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
return 0;
}
#ifdef DEBUG
#if 1 /*def DEBUG*/
s = getenv("x86_ask_start");
if (s)
{
......@@ -646,7 +645,7 @@ int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
if (getenv("x86_do_inout")) do_inout();
#endif
dcache_disable();
//FIXME: dcache_disable();
return 1;
}
......
......@@ -2,7 +2,7 @@
#include <command.h>
#include <cmd_menu.h>
int do_menu( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] )
int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] )
{
// printf("<NOT YET IMPLEMENTED>\n");
return 0;
......
......@@ -56,11 +56,13 @@ SECTIONS
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
lib_ppc/ppcstring.o (.text)
cpu/mpc8xx/interrupts.o (.text)
cpu/mpc8xx/start.o (.text)
common/dlmalloc.o (.text)
cpu/mpc8xx/interrupts.o (.text)
lib_ppc/time.o (.text)
lib_ppc/ticks.o (.text)
lib_ppc/cache.o (.text)
lib_generic/crc32.o (.text)
. = env_offset;
common/environment.o(.text)
......
......@@ -202,7 +202,7 @@ int checkboard (void)
if (!i || strncmp (str, "TQM8260", 7)) {
puts ("### No HW ID - assuming TQM8260\n");
return (1);
return (0);
}
puts (str);
......
......@@ -344,7 +344,7 @@ int drv_vfd_init(void)
DECLARE_GLOBAL_DATA_PTR;
if (vfd_init_done != 0)
return;
return (0);
vfd_init_done = 1;
vfdbase = gd->fb_base;
......
......@@ -205,9 +205,27 @@ void pci_header_show(pci_dev_t dev)
PRINT (" header type = 0x%.2x\n", byte, PCI_HEADER_TYPE);
PRINT (" BIST = 0x%.2x\n", byte, PCI_BIST);
PRINT (" base address 0 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_0);
PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
if (header_type & 0x01) { /* PCI-to-PCI bridge */
switch (header_type & 0x03) {
case PCI_HEADER_TYPE_NORMAL: /* "normal" PCI device */
PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
PRINT (" base address 2 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
PRINT (" base address 3 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
PRINT (" base address 4 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
PRINT (" base address 5 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
PRINT (" cardBus CIS pointer = 0x%.8x\n", dword, PCI_CARDBUS_CIS);
PRINT (" sub system vendor ID = 0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
PRINT (" sub system ID = 0x%.4x\n", word, PCI_SUBSYSTEM_ID);
PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS);
PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT);
PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT);
break;
case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */
PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
PRINT (" primary bus number = 0x%.2x\n", byte, PCI_PRIMARY_BUS);
PRINT (" secondary bus number = 0x%.2x\n", byte, PCI_SECONDARY_BUS);
PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_SUBORDINATE_BUS);
......@@ -227,19 +245,39 @@ void pci_header_show(pci_dev_t dev)
PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
PRINT (" bridge control = 0x%.4x\n", word, PCI_BRIDGE_CONTROL);
} else { /* PCI device */
PRINT(" base address 2 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
PRINT(" base address 3 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
PRINT(" base address 4 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
PRINT(" base address 5 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
PRINT(" cardBus CIS pointer = 0x%.8x\n", dword, PCI_CARDBUS_CIS);
PRINT(" sub system vendor ID = 0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
PRINT(" sub system ID = 0x%.4x\n", word, PCI_SUBSYSTEM_ID);
PRINT(" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS);
PRINT(" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
PRINT(" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
PRINT(" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT);
PRINT(" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT);
break;
case PCI_HEADER_TYPE_CARDBUS: /* PCI-to-CardBus bridge */
PRINT (" capabilities = 0x%.2x\n", byte, PCI_CB_CAPABILITY_LIST);
PRINT (" secondary status = 0x%.4x\n", word, PCI_CB_SEC_STATUS);
PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS);
PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS);
PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS);
PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);
PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0);
PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0);
PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1);
PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_1);
PRINT (" CardBus IO base 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0);
PRINT (" CardBus IO base high 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0_HI);
PRINT (" CardBus IO limit 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0);
PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0_HI);
PRINT (" CardBus IO base 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1);
PRINT (" CardBus IO base high 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1_HI);
PRINT (" CardBus IO limit 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1);
PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1_HI);
PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
PRINT (" bridge control = 0x%.4x\n", word, PCI_CB_BRIDGE_CONTROL);
PRINT (" subvendor ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_VENDOR_ID);
PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID);
PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE);
break;
default:
printf("unknown header\n");
break;
}
#undef PRINT
......
......@@ -156,6 +156,21 @@ static uchar env_get_char_init (int index)
return (c);
}
#ifdef CONFIG_AMIGAONEG3SE
uchar env_get_char_memory (int index)
{
DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
if (gd->env_valid) {
retval = ( *((uchar *)(gd->env_addr + index)) );
} else {
retval = ( default_environment[index] );
}
disable_nvram();
return retval;
}
#else
uchar env_get_char_memory (int index)
{
DECLARE_GLOBAL_DATA_PTR;
......@@ -166,6 +181,7 @@ uchar env_get_char_memory (int index)
return ( default_environment[index] );
}
}
#endif
uchar *env_get_addr (int index)
{
......
......@@ -66,7 +66,25 @@ extern int default_environment_size;
extern uchar (*env_get_char)(int);
extern uchar env_get_char_memory (int index);
#ifdef CONFIG_AMIGAONEG3SE
uchar env_get_char_spec (int index)
{
#ifdef CFG_NVRAM_ACCESS_ROUTINE
uchar c;
nvram_read(&c, CFG_ENV_ADDR+index, 1);
return c;
#else
DECLARE_GLOBAL_DATA_PTR;
uchar retval;
enable_nvram();
retval = *((uchar *)(gd->env_addr + index));
disable_nvram();
return retval;
#endif
}
#else
uchar env_get_char_spec (int index)
{
#ifdef CFG_NVRAM_ACCESS_ROUTINE
......@@ -81,6 +99,7 @@ uchar env_get_char_spec (int index)
return *((uchar *)(gd->env_addr + index));
#endif
}
#endif
void env_relocate_spec (void)
{
......@@ -94,12 +113,18 @@ void env_relocate_spec (void)
int saveenv (void)
{
int rcode = 0;
#ifdef CONFIG_AMIGAONEG3SE
enable_nvram();
#endif
#ifdef CFG_NVRAM_ACCESS_ROUTINE
nvram_write(CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE);
#else
if (memcpy ((char *)CFG_ENV_ADDR, env_ptr, CFG_ENV_SIZE) == NULL)
rcode = 1 ;
#endif
#ifdef CONFIG_AMIGAONEG3SE
udelay(10000);
disable_nvram();
#endif
return rcode;
}
......@@ -113,7 +138,9 @@ int saveenv (void)
int env_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_AMIGAONEG3SE
enable_nvram();
#endif
#if defined(CFG_NVRAM_ACCESS_ROUTINE)
ulong crc;
uchar data[ENV_SIZE];
......@@ -131,7 +158,9 @@ int env_init (void)
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
}
#ifdef CONFIG_AMIGAONEG3SE
disable_nvram();
#endif
return (0);
}
......
......@@ -177,7 +177,14 @@ SystemCall:
add r11,r11,r0
lwz r11,0(r11)
li r12,0xd00-4*3 /* save LR & SRRx */
li r20,0xd00-4 /* Get stack pointer */
lwz r12,0(r20)
subi r12,r12,12 /* Adjust stack pointer */
li r0,0xc00+_end_back-SystemCall
cmplw 0, r0, r12 /* Check stack overflow */
bgt 1f
stw r12,0(r20)
mflr r0
stw r0,0(r12)
mfspr r0,SRR0
......@@ -202,7 +209,9 @@ _back:
mtmsr r11
SYNC
li r12,0xd00-4*3 /* restore regs */
li r12,0xd00-4 /* restore regs */
lwz r12,0(r12)
lwz r11,0(r12)
mtlr r11
lwz r11,4(r12)
......@@ -210,8 +219,13 @@ _back:
lwz r11,8(r12)
mtspr SRR1,r11
addi r12,r12,12 /* Adjust stack pointer */
li r20,0xd00-4
stw r12,0(r20)
SYNC
rfi
_end_back:
<