Commit ed54e621 authored by wdenk's avatar wdenk

* Fix udelay() on AT91RM9200 for delays < 1 ms.

* Enable long help on CMC PU2 board;
  fix reset issue;
  increase CPU speed from 179 to 207 MHz.
parent bb310d46
......@@ -2,6 +2,12 @@
Changes since U-Boot 1.1.1:
======================================================================
* Fix udelay() on AT91RM9200 for delays < 1 ms.
* Enable long help on CMC PU2 board;
fix reset issue;
increase CPU speed from 179 to 207 MHz.
* Fix smc91111 ethernet driver for Xaeniax board (need to handle
unaligned tail part specially).
......
......@@ -57,11 +57,11 @@
/* clocks */
#define PLLAR 0xFFFFFC28
#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
#define PLLAR_VAL 0x202CBE04 /* 207.360 MHz for PCK */
#define PLLBR 0xFFFFFC2C
#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
#define MCKR 0xFFFFFC30
#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */
/* sdram */
#define PIOC_ASR 0xFFFFF870
......
......@@ -134,11 +134,25 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/*shutdown the console to avoid strange chars during reset */
us->US_CR = (AT91C_US_RSTRX | AT91C_US_RSTTX);
#ifdef CONFIG_AT91RM9200DK
/* Clear PA19 to trigger the hard reset */
pio->PIO_CODR = 0x00080000;
pio->PIO_OER = 0x00080000;
pio->PIO_PER = 0x00080000;
#endif
#ifdef CONFIG_CMC_PU2
/* this is the way Linux does it */
#define AT91C_ST_RSTEN (0x1 << 16)
#define AT91C_ST_EXTEN (0x1 << 17)
#define AT91C_ST_WDRST (0x1 << 0)
/* watchdog mode register */
#define ST_WDMR *((unsigned long *)0xfffffd08)
/* system clock control register */
#define ST_CR *((unsigned long *)0xfffffd00)
ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
ST_CR = AT91C_ST_WDRST;
/* Never reached */
#endif
#endif
return 0;
}
......
......@@ -193,9 +193,14 @@ void udelay_masked (unsigned long usec)
{
ulong tmo;
tmo = usec / 1000;
tmo *= CFG_HZ;
tmo /= 1000;
if (usec >= 1000) {
tmo = usec / 1000;
tmo *= CFG_HZ;
tmo /= 1000;
} else {
tmo = usec * CFG_HZ;
tmo /= (1000*1000);
}
reset_timer_masked ();
......
......@@ -32,8 +32,8 @@
#define CONFIG_INIT_CRITICAL /* undef for developing */
/* ARM asynchronous clock */
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
#define AT91C_MAIN_CLOCK 207360000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
#define AT91C_MASTER_CLOCK 69120000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
......@@ -60,7 +60,7 @@
#define CONFIG_BAUDRATE 9600
#define CFG_AT91C_BRGR_DIVISOR 390 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
#define CFG_AT91C_BRGR_DIVISOR 450 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
/*
* Hardware drivers
......@@ -86,6 +86,8 @@
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_I2C_EEPROM_ADDR_OVERFLOW
#endif
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
......@@ -114,6 +116,8 @@
CFG_CMD_MISC | \
CFG_CMD_LOADS ))
#endif
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
......
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