Commit 4aa33690 authored by Kever Yang's avatar Kever Yang

rockchip: elgin-rv1108: Use syscon API to get grf base

Use syscon API to get grf base instead of get from dts.
Signed-off-by: Kever Yang's avatarKever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass's avatarSimon Glass <sjg@chromium.org>
Acked-by: default avatarOtavio Salvador <otavio@ossystems.com.br>
parent 0aadc078
...@@ -5,8 +5,9 @@ ...@@ -5,8 +5,9 @@
*/ */
#include <common.h> #include <common.h>
#include <syscon.h>
#include <asm/io.h> #include <asm/io.h>
#include <fdtdec.h> #include <asm/arch-rockchip/clock.h>
#include <asm/arch-rockchip/grf_rv1108.h> #include <asm/arch-rockchip/grf_rv1108.h>
#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/hardware.h>
#include <asm/gpio.h> #include <asm/gpio.h>
...@@ -15,7 +16,6 @@ DECLARE_GLOBAL_DATA_PTR; ...@@ -15,7 +16,6 @@ DECLARE_GLOBAL_DATA_PTR;
int mach_cpu_init(void) int mach_cpu_init(void)
{ {
int node;
struct rv1108_grf *grf; struct rv1108_grf *grf;
enum { enum {
GPIO3C3_SHIFT = 6, GPIO3C3_SHIFT = 6,
...@@ -35,8 +35,7 @@ int mach_cpu_init(void) ...@@ -35,8 +35,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0, GPIO2D1_UART2_SIN_M0,
}; };
node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "rockchip,rv1108-grf"); grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
/* Elgin board use UART2 m0 for debug*/ /* Elgin board use UART2 m0 for debug*/
rk_clrsetreg(&grf->gpio2d_iomux, rk_clrsetreg(&grf->gpio2d_iomux,
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment