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    ARM: DRA7: Fixup DPLL clock rate fixup logic for newer kernels · a517c1f6
    Suman Anna authored and Tom Rini's avatar Tom Rini committed
    The commit 1b42ab3e
    
     ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
    frequencies based on OPP") updates the kernel device-tree blob to adjust
    the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected
    in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks
    DT node.
    
    The hierarchy of this clocks DT node has changed in newer Linux kernels
    starting from v5.0, and this results in a failure in ft_fixup_clocks()
    function to update the clock rates on these newer kernels. Fix this by
    updating the lookup logic to look through both the newer and older
    DT hierarchy paths for the cm_core_aon clocks node.
    
    Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
    a517c1f6