Makefile.build 1.26 KB
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# our default target
.PHONY: all
all:

include $(TOPDIR)/config.mk

LIB := $(obj)built-in.o
LIBGCC = $(obj)libgcc.o
SRCS :=

include Makefile

# Going forward use the following
obj-y := $(sort $(obj-y))
extra-y := $(sort $(extra-y))
lib-y := $(sort $(lib-y))

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subdir-y 	:= $(patsubst %/,%,$(filter %/, $(obj-y)))
obj-y		:= $(patsubst %/, %/built-in.o, $(obj-y))
subdir-obj-y	:= $(filter %/built-in.o, $(obj-y))
subdir-obj-y	:= $(addprefix $(obj),$(subdir-obj-y))

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SRCS	+= $(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
	$(lib-y:.o=.S) $(extra-y:.o=.c) $(extra-y:.o=.S))
OBJS	:= $(addprefix $(obj),$(obj-y))
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LGOBJS := $(addprefix $(obj),$(sort $(lib-y)))
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all: $(LIB) $(addprefix $(obj),$(extra-y))

$(LIB):	$(obj).depend $(OBJS)
	$(call cmd_link_o_target, $(OBJS))

ifneq ($(strip $(lib-y)),)
all: $(LIBGCC)

$(LIBGCC): $(obj).depend $(LGOBJS)
	$(call cmd_link_o_target, $(LGOBJS))
endif

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ifneq ($(subdir-obj-y),)
# Descending
$(subdir-obj-y): $(subdir-y)

$(subdir-y): FORCE
	$(MAKE) -C $@ -f $(TOPDIR)/scripts/Makefile.build
endif

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#########################################################################

# defines $(obj).depend target

include $(TOPDIR)/rules.mk

sinclude $(obj).depend

#########################################################################
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.PHONY: FORCE