Commit afe18f20 authored by Andy Yan's avatar Andy Yan Committed by Kever Yang

rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.
Signed-off-by: default avatarAndy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich's avatarPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang's avatarKever Yang <kever.yang@rock-chips.com>
parent 081a51c9
......@@ -58,6 +58,8 @@
};
&emmc {
/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
u-boot,spl-fifo-mode;
u-boot,dm-pre-reloc;
};
......
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