Commit ec4fafdf authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Kever Yang

rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL

UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang's avatarKever Yang <kever.yang@rock-chips.com>
parent b0c5e37d
......@@ -27,12 +27,12 @@ config TPL_MAX_SIZE
config TPL_STACK
default 0xff0e4fff
config DEBUG_UART2_CHANNEL
int "Mux channel to use for debug UART2"
config DEBUG_UART_CHANNEL
int "Mux channel to use for debug UART2/UART3"
depends on DEBUG_UART_BOARD_INIT
default 0
help
UART2 can use two different set of pins to route the output.
UART2 and UART3 can use two different set of pins to route the output.
For using the UART for early debugging the route to use needs
to be declared (0 or 1).
......
......@@ -222,7 +222,7 @@ void board_debug_uart_init(void)
UART2_CLK_SEL_MASK,
UART2_CLK_SEL_UART2 << UART2_CLK_SEL_SHIFT);
#if (CONFIG_DEBUG_UART2_CHANNEL == 1)
#if (CONFIG_DEBUG_UART_CHANNEL == 1)
/* Enable early UART2 */
rk_clrsetreg(&grf->iofunc_con0,
CON_IOMUX_UART2SEL_MASK,
......@@ -241,7 +241,7 @@ void board_debug_uart_init(void)
GPIO1D3_MASK | GPIO1D2_MASK,
GPIO1D3_UART2_RXM0 << GPIO1D3_SHIFT |
GPIO1D2_UART2_TXM0 << GPIO1D2_SHIFT);
#endif /* CONFIG_DEBUG_UART2_CHANNEL == 1 */
#endif /* CONFIG_DEBUG_UART_CHANNEL == 1 */
#endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
}
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment