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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2000 - 2013
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.

Summary:
========

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This directory contains the source code for U-Boot, a boot loader for
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Embedded boards based on PowerPC, ARM, MIPS and several other
processors, which can be installed in a boot ROM and used to
initialize and test the hardware or to download and run application
code.
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The development of U-Boot is closely related to Linux: some parts of
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the source code originate in the Linux source tree, we have some
header files in common, and special provision has been made to
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support booting of Linux images.

Some attention has been paid to make this software easily
configurable and extendable. For instance, all monitor commands are
implemented with the same call interface, so that it's very easy to
add new commands. Also, instead of permanently adding rarely used
code (for instance hardware test utilities) to the monitor, you can
load and run it dynamically.


Status:
=======

In general, all boards for which a configuration option exists in the
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Makefile have been tested to some extent and can be considered
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"working". In fact, many of them are used in production systems.

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In case of problems see the CHANGELOG file to find out who contributed
the specific port. In addition, there are various MAINTAINERS files
scattered throughout the U-Boot source identifying the people or
companies responsible for various boards and subsystems.
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Note: As of August, 2010, there is no longer a CHANGELOG file in the
actual U-Boot source tree; however, it can be created dynamically
from the Git log using:
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	make CHANGELOG

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Where to get help:
==================

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In case you have questions about, problems with or contributions for
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U-Boot, you should send a message to the U-Boot mailing list at
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<u-boot@lists.denx.de>. There is also an archive of previous traffic
on the mailing list - please search the archive before asking FAQ's.
Please see http://lists.denx.de/pipermail/u-boot and
http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
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Where to get source code:
=========================

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The U-Boot source code is maintained in the Git repository at
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git://www.denx.de/git/u-boot.git ; you can browse it online at
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary

The "snapshot" links on this page allow you to download tarballs of
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any version you might be interested in. Official releases are also
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available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
directory.

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Pre-built (and tested) images are available from
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ftp://ftp.denx.de/pub/u-boot/images/


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Where we come from:
===================

- start from 8xxrom sources
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- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
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- clean up code
- make it easier to add custom boards
- make it possible to add other [PowerPC] CPUs
- extend functions, especially:
  * Provide extended interface to Linux boot loader
  * S-Record download
  * network boot
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  * ATA disk / SCSI ... boot
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- create ARMBoot project (http://sourceforge.net/projects/armboot)
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- add other CPU families (starting with ARM)
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- create U-Boot project (http://sourceforge.net/projects/u-boot)
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- current project page: see http://www.denx.de/wiki/U-Boot
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Names and Spelling:
===================

The "official" name of this project is "Das U-Boot". The spelling
"U-Boot" shall be used in all written text (documentation, comments
in source files etc.). Example:

	This is the README file for the U-Boot project.

File names etc. shall be based on the string "u-boot". Examples:

	include/asm-ppc/u-boot.h

	#include <asm/u-boot.h>

Variable names, preprocessor constants etc. shall be either based on
the string "u_boot" or on "U_BOOT". Example:

	U_BOOT_VERSION		u_boot_logo
	IH_OS_U_BOOT		u_boot_hush_start
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Versioning:
===========

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Starting with the release in October 2008, the names of the releases
were changed from numerical release numbers without deeper meaning
into a time stamp based numbering. Regular releases are identified by
names consisting of the calendar year and month of the release date.
Additional fields (if present) indicate release candidates or bug fix
releases in "stable" maintenance trees.

Examples:
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	U-Boot v2009.11	    - Release November 2009
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	U-Boot v2009.11.1   - Release 1 in version November 2009 stable tree
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	U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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Directory Hierarchy:
====================

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/arch			Architecture specific files
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  /arc			Files generic to ARC architecture
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  /arm			Files generic to ARM architecture
  /m68k			Files generic to m68k architecture
  /microblaze		Files generic to microblaze architecture
  /mips			Files generic to MIPS architecture
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  /nds32		Files generic to NDS32 architecture
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  /nios2		Files generic to Altera NIOS2 architecture
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  /openrisc		Files generic to OpenRISC architecture
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  /powerpc		Files generic to PowerPC architecture
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  /riscv		Files generic to RISC-V architecture
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  /sandbox		Files generic to HW-independent "sandbox"
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  /sh			Files generic to SH architecture
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  /x86			Files generic to x86 architecture
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/api			Machine/arch independent API for external apps
/board			Board dependent files
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/cmd			U-Boot commands functions
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/common			Misc architecture independent functions
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/configs		Board default configuration files
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/disk			Code for disk drive partition handling
/doc			Documentation (don't expect too much)
/drivers		Commonly used device drivers
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/dts			Contains Makefile for building internal U-Boot fdt.
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/examples		Example code for standalone applications, etc.
/fs			Filesystem code (cramfs, ext2, jffs2, etc.)
/include		Header Files
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/lib			Library routines generic to all architectures
/Licenses		Various license files
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/net			Networking code
/post			Power On Self Test
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/scripts		Various build scripts and Makefiles
/test			Various unit test files
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/tools			Tools to build S-Record or U-Boot images, etc.
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Software Configuration:
=======================

Configuration is usually done using C preprocessor defines; the
rationale behind that is to avoid dead code whenever possible.

There are two classes of configuration variables:

* Configuration _OPTIONS_:
  These are selectable by the user and have names beginning with
  "CONFIG_".

* Configuration _SETTINGS_:
  These depend on the hardware etc. and should not be meddled with if
  you don't know what you're doing; they have names beginning with
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  "CONFIG_SYS_".
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Previously, all configuration was done by hand, which involved creating
symbolic links and editing configuration files manually. More recently,
U-Boot has added the Kbuild infrastructure used by the Linux kernel,
allowing you to use the "make menuconfig" command to configure your
build.
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Selection of Processor Architecture and Board Type:
---------------------------------------------------

For all supported boards there are ready-to-use default
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configurations available; just type "make <board_name>_defconfig".
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Example: For a TQM823L module type:

	cd u-boot
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	make TQM823L_defconfig
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Note: If you're looking for the default configuration file for a board
you're sure used to be there but is now missing, check the file
doc/README.scrapyard for a list of no longer supported boards.
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Sandbox Environment:
--------------------

U-Boot can be built natively to run on a Linux host using the 'sandbox'
board. This allows feature development which is not board- or architecture-
specific to be undertaken on a native platform. The sandbox is also used to
run some of U-Boot's tests.

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See doc/arch/index.rst for more details.
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Board Initialisation Flow:
--------------------------

This is the intended start-up flow for boards. This should apply for both
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SPL and U-Boot proper (i.e. they both follow the same rules).

Note: "SPL" stands for "Secondary Program Loader," which is explained in
more detail later in this file.

At present, SPL mostly uses a separate code path, but the function names
and roles of each function are the same. Some boards or architectures
may not conform to this.  At least most ARM boards which use
CONFIG_SPL_FRAMEWORK conform to this.

Execution typically starts with an architecture-specific (and possibly
CPU-specific) start.S file, such as:

	- arch/arm/cpu/armv7/start.S
	- arch/powerpc/cpu/mpc83xx/start.S
	- arch/mips/cpu/start.S
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and so on. From there, three functions are called; the purpose and
limitations of each of these functions are described below.
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lowlevel_init():
	- purpose: essential init to permit execution to reach board_init_f()
	- no global_data or BSS
	- there is no stack (ARMv7 may have one but it will soon be removed)
	- must not set up SDRAM or use console
	- must only do the bare minimum to allow execution to continue to
		board_init_f()
	- this is almost never needed
	- return normally from this function

board_init_f():
	- purpose: set up the machine ready for running board_init_r():
		i.e. SDRAM and serial UART
	- global_data is available
	- stack is in SRAM
	- BSS is not available, so you cannot use global/static variables,
		only stack variables and global_data

	Non-SPL-specific notes:
	- dram_init() is called to set up DRAM. If already done in SPL this
		can do nothing

	SPL-specific notes:
	- you can override the entire board_init_f() function with your own
		version as needed.
	- preloader_console_init() can be called here in extremis
	- should set up SDRAM, and anything needed to make the UART work
	- these is no need to clear BSS, it will be done by crt0.S
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	- for specific scenarios on certain architectures an early BSS *can*
	  be made available (via CONFIG_SPL_EARLY_BSS by moving the clearing
	  of BSS prior to entering board_init_f()) but doing so is discouraged.
	  Instead it is strongly recommended to architect any code changes
	  or additions such to not depend on the availability of BSS during
	  board_init_f() as indicated in other sections of this README to
	  maintain compatibility and consistency across the entire code base.
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	- must return normally from this function (don't call board_init_r()
		directly)

Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
this point the stack and global_data are relocated to below
CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
memory.

board_init_r():
	- purpose: main execution, common code
	- global_data is available
	- SDRAM is available
	- BSS is available, all static/global variables can be used
	- execution eventually continues to main_loop()

	Non-SPL-specific notes:
	- U-Boot is relocated to the top of memory and is now running from
		there.

	SPL-specific notes:
	- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
		CONFIG_SPL_STACK_R_ADDR points into SDRAM
	- preloader_console_init() can be called here - typically this is
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		done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
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		spl_board_init() function containing this call
	- loads U-Boot or (in falcon mode) Linux



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Configuration Options:
----------------------

Configuration depends on the combination of board and CPU type; all
such information is kept in a configuration file
"include/configs/<board_name>.h".

Example: For a TQM823L module, all configuration settings are in
"include/configs/TQM823L.h".


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Many of the options are named exactly as the corresponding Linux
kernel configuration options. The intention is to make it easier to
build a config tool - later.

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- ARM Platform Bus Type(CCI):
		CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
		provides full cache coherency between two clusters of multi-core
		CPUs and I/O coherency for devices and I/O masters

		CONFIG_SYS_FSL_HAS_CCI400

		Defined For SoC that has cache coherent interconnect
		CCN-400
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		CONFIG_SYS_FSL_HAS_CCN504

		Defined for SoC that has cache coherent interconnect CCN-504

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The following options need to be configured:

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- CPU Type:	Define exactly one, e.g. CONFIG_MPC85XX.

- Board Type:	Define exactly one, e.g. CONFIG_MPC8540ADS.
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- 85xx CPU Options:
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		CONFIG_SYS_PPC64

		Specifies that the core is a 64-bit PowerPC implementation (implements
		the "64" category of the Power ISA). This is necessary for ePAPR
		compliance, among other possible reasons.

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		CONFIG_SYS_FSL_TBCLK_DIV

		Defines the core time base clock divider ratio compared to the
		system clock.  On most PQ3 devices this is 8, on newer QorIQ
		devices it can be 16 or 32.  The ratio varies from SoC to Soc.

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		CONFIG_SYS_FSL_PCIE_COMPAT

		Defines the string to utilize when trying to match PCIe device
		tree nodes for the given platform.

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		CONFIG_SYS_FSL_ERRATUM_A004510

		Enables a workaround for erratum A004510.  If set,
		then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
		CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.

		CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
		CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)

		Defines one or two SoC revisions (low 8 bits of SVR)
		for which the A004510 workaround should be applied.

		The rest of SVR is either not relevant to the decision
		of whether the erratum is present (e.g. p2040 versus
		p2041) or is implied by the build target, which controls
		whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.

		See Freescale App Note 4493 for more information about
		this erratum.

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		CONFIG_A003399_NOR_WORKAROUND
		Enables a workaround for IFC erratum A003399. It is only
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		required during NOR boot.
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		CONFIG_A008044_WORKAROUND
		Enables a workaround for T1040/T1042 erratum A008044. It is only
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		required during NAND boot and valid for Rev 1.0 SoC revision
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		CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY

		This is the value to write into CCSR offset 0x18600
		according to the A004510 workaround.

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		CONFIG_SYS_FSL_DSP_DDR_ADDR
		This value denotes start offset of DDR memory which is
		connected exclusively to the DSP cores.

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		CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
		This value denotes start offset of M2 memory
		which is directly connected to the DSP core.

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		CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
		This value denotes start offset of M3 memory which is directly
		connected to the DSP core.

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		CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
		This value denotes start offset of DSP CCSR space.

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		CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
		Single Source Clock is clocking mode present in some of FSL SoC's.
		In this mode, a single differential clock is used to supply
		clocks to the sysclock, ddrclock and usbclock.

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		CONFIG_SYS_CPC_REINIT_F
		This CONFIG is defined when the CPC is configured as SRAM at the
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		time of U-Boot entry and is required to be re-initialized.
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		CONFIG_DEEP_SLEEP
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		Indicates this SoC supports deep sleep feature. If deep sleep is
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		supported, core will start to execute uboot when wakes up.

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- Generic CPU options:
		CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN

		Defines the endianess of the CPU. Implementation of those
		values is arch specific.

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		CONFIG_SYS_FSL_DDR
		Freescale DDR driver in use. This type of DDR controller is
		found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
		SoCs.

		CONFIG_SYS_FSL_DDR_ADDR
		Freescale DDR memory-mapped register base.

		CONFIG_SYS_FSL_DDR_EMU
		Specify emulator support for DDR. Some DDR features such as
		deskew training are not available.

		CONFIG_SYS_FSL_DDRC_GEN1
		Freescale DDR1 controller.

		CONFIG_SYS_FSL_DDRC_GEN2
		Freescale DDR2 controller.

		CONFIG_SYS_FSL_DDRC_GEN3
		Freescale DDR3 controller.

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		CONFIG_SYS_FSL_DDRC_GEN4
		Freescale DDR4 controller.

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		CONFIG_SYS_FSL_DDRC_ARM_GEN3
		Freescale DDR3 controller for ARM-based SoCs.

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		CONFIG_SYS_FSL_DDR1
		Board config to use DDR1. It can be enabled for SoCs with
		Freescale DDR1 or DDR2 controllers, depending on the board
		implemetation.

		CONFIG_SYS_FSL_DDR2
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		Board config to use DDR2. It can be enabled for SoCs with
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		Freescale DDR2 or DDR3 controllers, depending on the board
		implementation.

		CONFIG_SYS_FSL_DDR3
		Board config to use DDR3. It can be enabled for SoCs with
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		Freescale DDR3 or DDR3L controllers.

		CONFIG_SYS_FSL_DDR3L
		Board config to use DDR3L. It can be enabled for SoCs with
		DDR3L controllers.

		CONFIG_SYS_FSL_DDR4
		Board config to use DDR4. It can be enabled for SoCs with
		DDR4 controllers.
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		CONFIG_SYS_FSL_IFC_BE
		Defines the IFC controller register space as Big Endian

		CONFIG_SYS_FSL_IFC_LE
		Defines the IFC controller register space as Little Endian

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		CONFIG_SYS_FSL_IFC_CLK_DIV
		Defines divider of platform clock(clock input to IFC controller).

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		CONFIG_SYS_FSL_LBC_CLK_DIV
		Defines divider of platform clock(clock input to eLBC controller).

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		CONFIG_SYS_FSL_PBL_PBI
		It enables addition of RCW (Power on reset configuration) in built image.
		Please refer doc/README.pblimage for more details

		CONFIG_SYS_FSL_PBL_RCW
		It adds PBI(pre-boot instructions) commands in u-boot build image.
		PBI commands can be used to configure SoC before it starts the execution.
		Please refer doc/README.pblimage for more details

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		CONFIG_SYS_FSL_DDR_BE
		Defines the DDR controller register space as Big Endian

		CONFIG_SYS_FSL_DDR_LE
		Defines the DDR controller register space as Little Endian

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		CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
		Physical address from the view of DDR controllers. It is the
		same as CONFIG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
		it could be different for ARM SoCs.

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		CONFIG_SYS_FSL_DDR_INTLV_256B
		DDR controller interleaving on 256-byte. This is a special
		interleaving mode, handled by Dickens for Freescale layerscape
		SoCs with ARM core.

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		CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
		Number of controllers used as main memory.

		CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
		Number of controllers used for other than main memory.

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		CONFIG_SYS_FSL_HAS_DP_DDR
		Defines the SoC has DP-DDR used for DPAA.

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		CONFIG_SYS_FSL_SEC_BE
		Defines the SEC controller register space as Big Endian

		CONFIG_SYS_FSL_SEC_LE
		Defines the SEC controller register space as Little Endian

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- MIPS CPU options:
		CONFIG_SYS_INIT_SP_OFFSET

		Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
		pointer. This is needed for the temporary stack before
		relocation.

		CONFIG_XWAY_SWAP_BYTES

		Enable compilation of tools/xway-swap-bytes needed for Lantiq
		XWAY SoCs for booting from NOR flash. The U-Boot image needs to
		be swapped if a flash programmer is used.

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- ARM options:
		CONFIG_SYS_EXCEPTION_VECTORS_HIGH

		Select high exception vectors of the ARM core, e.g., do not
		clear the V bit of the c1 register of CP15.

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		COUNTER_FREQUENCY
		Generic timer clock source frequency.

		COUNTER_FREQUENCY_REAL
		Generic timer clock source frequency if the real clock is
		different from COUNTER_FREQUENCY, and can only be determined
		at run time.

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- Tegra SoC options:
		CONFIG_TEGRA_SUPPORT_NON_SECURE

		Support executing U-Boot in non-secure (NS) mode. Certain
		impossible actions will be skipped if the CPU is in NS mode,
		such as ARM architectural timer initialization.

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- Linux Kernel Interface:
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		CONFIG_CLOCKS_IN_MHZ

		U-Boot stores all clock information in Hz
		internally. For binary compatibility with older Linux
		kernels (which expect the clocks passed in the
		bd_info data to be in MHz) the environment variable
		"clocks_in_mhz" can be defined so that U-Boot
		converts clock data to MHZ before passing it to the
		Linux kernel.
		When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
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		"clocks_in_mhz=1" is automatically included in the
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		default environment.

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		CONFIG_MEMSIZE_IN_BYTES		[relevant for MIPS only]

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		When transferring memsize parameter to Linux, some versions
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		expect it to be in bytes, others in MB.
		Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.

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		CONFIG_OF_LIBFDT
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		New kernel versions are expecting firmware settings to be
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		passed using flattened device trees (based on open firmware
		concepts).

		CONFIG_OF_LIBFDT
		 * New libfdt-based support
		 * Adds the "fdt" command
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		 * The bootm command automatically updates the fdt
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		OF_TBCLK - The timebase frequency.
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		OF_STDOUT_PATH - The path to the console device
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		boards with QUICC Engines require OF_QE to set UCC MAC
		addresses
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		CONFIG_OF_BOARD_SETUP

		Board code has addition modification that it wants to make
		to the flat device tree before handing it off to the kernel
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		CONFIG_OF_SYSTEM_SETUP

		Other code has addition modification that it wants to make
		to the flat device tree before handing it off to the kernel.
		This causes ft_system_setup() to be called before booting
		the kernel.

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		CONFIG_OF_IDE_FIXUP

		U-Boot can detect if an IDE device is present or not.
		If not, and this new config option is activated, U-Boot
		removes the ATA node from the DTS before booting Linux,
		so the Linux IDE driver does not probe the device and
		crash. This is needed for buggy hardware (uc101) where
		no pull down resistor is connected to the signal IDE5V_DD7.

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		CONFIG_MACH_TYPE	[relevant for ARM only][mandatory]

		This setting is mandatory for all boards that have only one
		machine type and must be used to specify the machine type
		number as it appears in the ARM machine registry
		(see http://www.arm.linux.org.uk/developer/machines/).
		Only boards that have multiple machine types supported
		in a single configuration file and the machine type is
		runtime discoverable, do not have to use this setting.

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- vxWorks boot parameters:

		bootvx constructs a valid bootline using the following
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		environments variables: bootdev, bootfile, ipaddr, netmask,
		serverip, gatewayip, hostname, othbootargs.
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		It loads the vxWorks image pointed bootfile.

		Note: If a "bootargs" environment is defined, it will overwride
		the defaults discussed just above.

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- Cache Configuration:
		CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot

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- Cache Configuration for ARM:
		CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
				      controller
		CONFIG_SYS_PL310_BASE - Physical base address of PL310
					controller register space

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- Serial Ports:
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		CONFIG_PL010_SERIAL
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		Define this if you want support for Amba PrimeCell PL010 UARTs.

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		CONFIG_PL011_SERIAL
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		Define this if you want support for Amba PrimeCell PL011 UARTs.

		CONFIG_PL011_CLOCK

		If you have Amba PrimeCell PL011 UARTs, set this variable to
		the clock speed of the UARTs.

		CONFIG_PL01x_PORTS

		If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
		define this to a list of base addresses for each (supported)
		port. See e.g. include/configs/versatile.h

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		CONFIG_SERIAL_HW_FLOW_CONTROL

		Define this variable to enable hw flow control in serial driver.
		Current user of this option is drivers/serial/nsl16550.c driver
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- Console Baudrate:
		CONFIG_BAUDRATE - in bps
		Select one of the baudrates listed in
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		CONFIG_SYS_BAUDRATE_TABLE, see below.
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- Autoboot Command:
		CONFIG_BOOTCOMMAND
		Only needed when CONFIG_BOOTDELAY is enabled;
		define a command string that is automatically executed
		when no character is read on the console interface
		within "Boot Delay" after reset.

		CONFIG_RAMBOOT and CONFIG_NFSBOOT
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		The value of these goes into the environment as
		"ramboot" and "nfsboot" respectively, and can be used
		as a convenience, when switching between booting from
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		RAM and NFS.
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- Serial Download Echo Mode:
		CONFIG_LOADS_ECHO
		If defined to 1, all characters received during a
		serial download (using the "loads" command) are
		echoed back. This might be needed by some terminal
		emulations (like "cu"), but may as well just take
		time on others. This setting #define's the initial
		value of the "loads_echo" environment variable.

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- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
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		CONFIG_KGDB_BAUDRATE
		Select one of the baudrates listed in
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		CONFIG_SYS_BAUDRATE_TABLE, see below.
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- Removal of commands
		If no commands are needed to boot, you can disable
		CONFIG_CMDLINE to remove them. In this case, the command line
		will not be available, and when U-Boot wants to execute the
		boot command (on start-up) it will call board_run_command()
		instead. This can reduce image size significantly for very
		simple boot procedures.

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- Regular expression support:
		CONFIG_REGEX
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		If this variable is defined, U-Boot is linked against
		the SLRE (Super Light Regular Expression) library,
		which adds regex support to some commands, as for
		example "env grep" and "setexpr".
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- Device tree:
		CONFIG_OF_CONTROL
		If this variable is defined, U-Boot will use a device tree
		to configure its devices, instead of relying on statically
		compiled #defines in the board file. This option is
		experimental and only available on a few boards. The device
		tree is available in the global data as gd->fdt_blob.

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		U-Boot needs to get its device tree from somewhere. This can
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		be done using one of the three options below:
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		CONFIG_OF_EMBED
		If this variable is defined, U-Boot will embed a device tree
		binary in its image. This device tree file should be in the
		board directory and called <soc>-<board>.dts. The binary file
		is then picked up in board_init_f() and made available through
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		the global data structure as gd->fdt_blob.
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		CONFIG_OF_SEPARATE
		If this variable is defined, U-Boot will build a device tree
		binary. It will be called u-boot.dtb. Architecture-specific
		code will locate it at run-time. Generally this works by:

			cat u-boot.bin u-boot.dtb >image.bin

		and in fact, U-Boot does this for you, creating a file called
		u-boot-dtb.bin which is useful in the common case. You can
		still use the individual files if you need something more
		exotic.

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		CONFIG_OF_BOARD
		If this variable is defined, U-Boot will use the device tree
		provided by the board at runtime instead of embedding one with
		the image. Only boards defining board_fdt_blob_setup() support
		this option (see include/fdtdec.h file).

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- Watchdog:
		CONFIG_WATCHDOG
		If this variable is defined, it enables watchdog
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		support for the SoC. There must be support in the SoC
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		specific code for a watchdog. For the 8xx
		CPUs, the SIU Watchdog feature is enabled in the SYPCR
		register.  When supported for a specific SoC is
		available, then no further board specific code should
		be needed to use it.
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		CONFIG_HW_WATCHDOG
		When using a watchdog circuitry external to the used
		SoC, then define this variable and provide board
		specific code for the "hw_watchdog_reset" function.
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- Real-Time Clock:

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		When CONFIG_CMD_DATE is selected, the type of the RTC
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		has to be selected, too. Define exactly one of the
		following options:

		CONFIG_RTC_PCF8563	- use Philips PCF8563 RTC
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		CONFIG_RTC_MC13XXX	- use MC13783 or MC13892 RTC
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		CONFIG_RTC_MC146818	- use MC146818 RTC
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		CONFIG_RTC_DS1307	- use Maxim, Inc. DS1307 RTC
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		CONFIG_RTC_DS1337	- use Maxim, Inc. DS1337 RTC
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		CONFIG_RTC_DS1338	- use Maxim, Inc. DS1338 RTC
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		CONFIG_RTC_DS1339	- use Maxim, Inc. DS1339 RTC
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		CONFIG_RTC_DS164x	- use Dallas DS164x RTC
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		CONFIG_RTC_ISL1208	- use Intersil ISL1208 RTC
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		CONFIG_RTC_MAX6900	- use Maxim, Inc. MAX6900 RTC
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		CONFIG_RTC_DS1337_NOOSC	- Turn off the OSC output for DS1337
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		CONFIG_SYS_RV3029_TCR	- enable trickle charger on
					  RV3029 RTC.
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		Note that if the RTC uses I2C, then the I2C interface
		must also be configured. See I2C Support, below.

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- GPIO Support:
		CONFIG_PCA953X		- use NXP's PCA953X series I2C GPIO

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		The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
		chip-ngpio pairs that tell the PCA953X driver the number of
		pins supported by a particular chip.

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		Note that if the GPIO device uses I2C, then the I2C interface
		must also be configured. See I2C Support, below.

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- I/O tracing:
		When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
		accesses and can checksum them or write a list of them out
		to memory. See the 'iotrace' command for details. This is
		useful for testing device drivers since it can confirm that
		the driver behaves the same way before and after a code
		change. Currently this is supported on sandbox and arm. To
		add support for your architecture, add '#include <iotrace.h>'
		to the bottom of arch/<arch>/include/asm/io.h and test.

		Example output from the 'iotrace stats' command is below.
		Note that if the trace buffer is exhausted, the checksum will
		still continue to operate.

			iotrace is enabled
			Start:  10000000	(buffer start address)
			Size:   00010000	(buffer size)
			Offset: 00000120	(current buffer offset)
			Output: 10000120	(start + offset)
			Count:  00000018	(number of trace records)
			CRC32:  9526fb66	(CRC32 of all trace records)

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- Timestamp Support:

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		When CONFIG_TIMESTAMP is selected, the timestamp
		(date and time) of an image is printed by image
		commands like bootm or iminfo. This option is
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		automatically enabled when you select CONFIG_CMD_DATE .
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- Partition Labels (disklabels) Supported:
		Zero or more of the following:
		CONFIG_MAC_PARTITION   Apple's MacOS partition table.
		CONFIG_ISO_PARTITION   ISO partition table, used on CDROM etc.
		CONFIG_EFI_PARTITION   GPT partition table, common when EFI is the
				       bootloader.  Note 2TB partition limit; see
				       disk/part_efi.c
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		CONFIG_SCSI) you must configure support for at
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		least one non-MTD partition type as well.
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- IDE Reset method:
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		CONFIG_IDE_RESET_ROUTINE - this is defined in several
		board configurations files but used nowhere!
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		CONFIG_IDE_RESET - is this is defined, IDE Reset will
		be performed by calling the function
			ide_set_reset(int reset)
		which has to be defined in a board specific file
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- ATAPI Support:
		CONFIG_ATAPI

		Set this to enable ATAPI support.

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- LBA48 Support
		CONFIG_LBA48

		Set this to enable support for disks larger than 137GB
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		Also look at CONFIG_SYS_64BIT_LBA.
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		Whithout these , LBA48 support uses 32bit variables and will 'only'
		support disks up to 2.1TB.

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		CONFIG_SYS_64BIT_LBA:
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			When enabled, makes the IDE subsystem use 64bit sector addresses.
			Default is 32bit.

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- SCSI Support:
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		CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
		CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
		CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
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		maximum numbers of LUNs, SCSI ID's and target
		devices.

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		The environment variable 'scsidevs' is set to the number of
		SCSI devices found during the last scan.
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- NETWORK Support (PCI):
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		CONFIG_E1000
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		Support for Intel 8254x/8257x gigabit chips.

		CONFIG_E1000_SPI
		Utility code for direct access to the SPI bus on Intel 8257x.
		This does not do anything useful unless you set at least one
		of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.

		CONFIG_E1000_SPI_GENERIC
		Allow generic access to the SPI bus on the Intel 8257x, for
		example with the "sspi" command.

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		CONFIG_EEPRO100
		Support for Intel 82557/82559/82559ER chips.
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		Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
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		write routine for first time initialisation.

		CONFIG_TULIP
		Support for Digital 2114x chips.
		Optional CONFIG_TULIP_SELECT_MEDIA for board specific
		modem chip initialisation (KS8761/QS6611).

		CONFIG_NATSEMI
		Support for National dp83815 chips.

		CONFIG_NS8382X
		Support for National dp8382[01] gigabit chips.

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- NETWORK Support (other):

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		CONFIG_DRIVER_AT91EMAC
		Support for AT91RM9200 EMAC.

			CONFIG_RMII
			Define this to use reduced MII inteface

			CONFIG_DRIVER_AT91EMAC_QUIET
			If this defined, the driver is quiet.
			The driver doen't show link status messages.

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		CONFIG_CALXEDA_XGMAC
		Support for the Calxeda XGMAC device

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		CONFIG_LAN91C96
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		Support for SMSC's LAN91C96 chips.

			CONFIG_LAN91C96_USE_32_BIT
			Define this to enable 32 bit addressing

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		CONFIG_SMC91111
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		Support for SMSC's LAN91C111 chip

			CONFIG_SMC91111_BASE
			Define this to hold the physical address
			of the device (I/O space)

			CONFIG_SMC_USE_32_BIT
			Define this if data bus is 32 bits

			CONFIG_SMC_USE_IOFUNCS
			Define this to use i/o functions instead of macros
			(some hardware wont work with macros)

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			CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
			Define this if you have more then 3 PHYs.

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		CONFIG_FTGMAC100
		Support for Faraday's FTGMAC100 Gigabit SoC Ethernet

			CONFIG_FTGMAC100_EGIGA
			Define this to use GE link update with gigabit PHY.
			Define this if FTGMAC100 is connected to gigabit PHY.
			If your system has 10/100 PHY only, it might not occur
			wrong behavior. Because PHY usually return timeout or
			useless data when polling gigabit status and gigabit
			control registers. This behavior won't affect the
			correctnessof 10/100 link speed update.

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		CONFIG_SH_ETHER
		Support for Renesas on-chip Ethernet controller

			CONFIG_SH_ETHER_USE_PORT
			Define the number of ports to be used

			CONFIG_SH_ETHER_PHY_ADDR
			Define the ETH PHY's address

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			CONFIG_SH_ETHER_CACHE_WRITEBACK
			If this option is set, the driver enables cache flush.

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- TPM Support:
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		CONFIG_TPM
		Support TPM devices.

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		CONFIG_TPM_TIS_INFINEON
		Support for Infineon i2c bus TPM devices. Only one device
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		per system is supported at this time.

			CONFIG_TPM_TIS_I2C_BURST_LIMITATION
			Define the burst count bytes upper limit

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		CONFIG_TPM_ST33ZP24
		Support for STMicroelectronics TPM devices. Requires DM_TPM support.

			CONFIG_TPM_ST33ZP24_I2C
			Support for STMicroelectronics ST33ZP24 I2C devices.
			Requires TPM_ST33ZP24 and I2C.

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			CONFIG_TPM_ST33ZP24_SPI
			Support for STMicroelectronics ST33ZP24 SPI devices.
			Requires TPM_ST33ZP24 and SPI.

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		CONFIG_TPM_ATMEL_TWI
		Support for Atmel TWI TPM device. Requires I2C support.

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		CONFIG_TPM_TIS_LPC
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		Support for generic parallel port TPM devices. Only one device
		per system is supported at this time.

			CONFIG_TPM_TIS_BASE_ADDRESS
			Base address where the generic TPM device is mapped
			to. Contemporary x86 systems usually map it at
			0xfed40000.

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		CONFIG_TPM
		Define this to enable the TPM support library which provides
		functional interfaces to some TPM commands.
		Requires support for a TPM device.

		CONFIG_TPM_AUTH_SESSIONS
		Define this to enable authorized functions in the TPM library.
		Requires CONFIG_TPM and CONFIG_SHA1.

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- USB Support:
		At the moment only the UHCI host controller is
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		supported (PIP405, MIP405); define
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		CONFIG_USB_UHCI to enable it.
		define CONFIG_USB_KEYBOARD to enable the USB Keyboard
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		and define CONFIG_USB_STORAGE to enable the USB
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		storage devices.
		Note:
		Supported are USB Keyboards and USB Floppy drives
		(TEAC FD-05PUB).
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		CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
		txfilltuning field in the EHCI controller on reset.

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		CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
		HW module registers.

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- USB Device:
		Define the below if you wish to use the USB console.
		Once firmware is rebuilt from a serial console issue the
		command "setenv stdin usbtty; setenv stdout usbtty" and
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		attach your USB cable. The Unix command "dmesg" should print
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		it has found a new device. The environment variable usbtty
		can be set to gserial or cdc_acm to enable your device to
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		appear to a USB host as a Linux gserial device or a
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		Common Device Class Abstract Control Model serial device.
		If you select usbtty = gserial you should be able to enumerate
		a Linux host by
		# modprobe usbserial vendor=0xVendorID product=0xProductID
		else if using cdc_acm, simply setting the environment
		variable usbtty to be cdc_acm should suffice. The following
		might be defined in YourBoardName.h
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			CONFIG_USB_DEVICE
			Define this to build a UDC device

			CONFIG_USB_TTY
			Define this to have a tty type of device available to
			talk to the UDC device
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			CONFIG_USBD_HS
			Define this to enable the high speed support for usb
			device and usbtty. If this feature is enabled, a routine
			int is_usbd_high_speed(void)
			also needs to be defined by the driver to dynamically poll
			whether the enumeration has succeded at high speed or full
			speed.

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			CONFIG_SYS_CONSOLE_IS_IN_ENV
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			Define this if you want stdin, stdout &/or stderr to
			be set to usbtty.

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		If you have a USB-IF assigned VendorID then you may wish to
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		define your own vendor specific values either in BoardName.h
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		or directly in usbd_vendor_info.h. If you don't define
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		CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
		CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
		should pretend to be a Linux device to it's target host.

			CONFIG_USBD_MANUFACTURER
			Define this string as the name of your company for
			- CONFIG_USBD_MANUFACTURER "my company"
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			CONFIG_USBD_PRODUCT_NAME
			Define this string as the name of your product
			- CONFIG_USBD_PRODUCT_NAME "acme usb device"

			CONFIG_USBD_VENDORID
			Define this as your assigned Vendor ID from the USB
			Implementors Forum. This *must* be a genuine Vendor ID
			to avoid polluting the USB namespace.
			- CONFIG_USBD_VENDORID 0xFFFF
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			CONFIG_USBD_PRODUCTID
			Define this as the unique Product ID
			for your device
			- CONFIG_USBD_PRODUCTID 0xFFFF
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- ULPI Layer Support:
		The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
		the generic ULPI layer. The generic layer accesses the ULPI PHY
		via the platform viewport, so you need both the genric layer and
		the viewport enabled. Currently only Chipidea/ARC based
		viewport is supported.
		To enable the ULPI layer support, define CONFIG_USB_ULPI and
		CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
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		If your ULPI phy needs a different reference clock than the
		standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
		the appropriate value in Hz.
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- MMC Support:
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		The MMC controller on the Intel PXA is supported. To
		enable this define CONFIG_MMC. The MMC can be
		accessed from the boot prompt by mapping the device
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		to physical memory similar to flash. Command line is
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		enabled with CONFIG_CMD_MMC. The MMC driver also works with
		the FAT fs. This is enabled with CONFIG_CMD_FAT.
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		CONFIG_SH_MMCIF
		Support for Renesas on-chip MMCIF controller

			CONFIG_SH_MMCIF_ADDR
			Define the base address of MMCIF registers

			CONFIG_SH_MMCIF_CLK
			Define the clock frequency for MMCIF

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- USB Device Firmware Update (DFU) class support:
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		CONFIG_DFU_OVER_USB
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		This enables the USB portion of the DFU USB class

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		CONFIG_DFU_NAND
		This enables support for exposing NAND devices via DFU.

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		CONFIG_DFU_RAM
		This enables support for exposing RAM via DFU.
		Note: DFU spec refer to non-volatile memory usage, but
		allow usages beyond the scope of spec - here RAM usage,
		one that would help mostly the developer.

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		CONFIG_SYS_DFU_DATA_BUF_SIZE
		Dfu transfer uses a buffer before writing data to the
		raw storage device. Make the size (in bytes) of this buffer
		configurable. The size of this buffer is also configurable
		through the "dfu_bufsiz" environment variable.

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		CONFIG_SYS_DFU_MAX_FILE_SIZE
		When updating files rather than the raw storage device,
		we use a static buffer to copy the file into and then write
		the buffer once we've been given the whole file.  Define
		this to the maximum filesize (in bytes) for the buffer.
		Default is 4 MiB if undefined.

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		DFU_DEFAULT_POLL_TIMEOUT
		Poll timeout [ms], is the timeout a device can send to the
		host. The host must wait for this timeout before sending
		a subsequent DFU_GET_STATUS request to the device.

		DFU_MANIFEST_POLL_TIMEOUT
		Poll timeout [ms], which the device sends to the host when
		entering dfuMANIFEST state. Host waits this timeout, before
		sending again an USB request to the device.

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- Journaling Flash filesystem support:
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		CONFIG_JFFS2_NAND
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		Define these for a default partition on a NAND device

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		CONFIG_SYS_JFFS2_FIRST_SECTOR,
		CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
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		Define these for a default partition on a NOR device

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- Keyboard Support:
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		See Kconfig help for available keyboard drivers.

		CONFIG_KEYBOARD

		Define this to enable a custom keyboard support.
		This simply calls drv_keyboard_init() which must be
		defined in your board-specific files. This option is deprecated
		and is only used by novena. For new boards, use driver model
		instead.
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- Video support:
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		CONFIG_FSL_DIU_FB
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		Enable the Freescale DIU video driver.	Reference boards for
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		SOCs that have a DIU should define this macro to enable DIU
		support, and should also define these other macros:

			CONFIG_SYS_DIU_ADDR
			CONFIG_VIDEO
			CONFIG_CFB_CONSOLE
			CONFIG_VIDEO_SW_CURSOR
			CONFIG_VGA_AS_SINGLE_DEVICE
			CONFIG_VIDEO_LOGO
			CONFIG_VIDEO_BMP_LOGO

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		The DIU driver will look for the 'video-mode' environment
		variable, and if defined, enable the DIU as a console during
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		boot.  See the documentation file doc/README.video for a
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		description of this variable.
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- LCD Support:	CONFIG_LCD

		Define this to enable LCD support (for output to LCD
		display); also select one of the supported displays
		by defining one of these:

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		CONFIG_ATMEL_LCD:

			HITACHI TX09D70VM1CCA, 3.5", 240x320.

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		CONFIG_NEC_NL6448AC33:
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			NEC NL6448AC33-18. Active, color, single scan.
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		CONFIG_NEC_NL6448BC20
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			NEC NL6448BC20-08. 6.5", 640x480.
			Active, color, single scan.

		CONFIG_NEC_NL6448BC33_54

			NEC NL6448BC33-54. 10.4", 640x480.
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			Active, color, single scan.

		CONFIG_SHARP_16x9

			Sharp 320x240. Active, color, single scan.
			It isn't 16x9, and I am not sure what it is.

		CONFIG_SHARP_LQ64D341

			Sharp LQ64D341 display, 640x480.
			Active, color, single scan.

		CONFIG_HLD1045

			HLD1045 display, 640x480.
			Active, color, single scan.

		CONFIG_OPTREX_BW

			Optrex	 CBL50840-2 NF-FW 99 22 M5
			or
			Hitachi	 LMG6912RPFC-00T
			or
			Hitachi	 SP14Q002

			320x240. Black & white.

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		CONFIG_LCD_ALIGNMENT

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		Normally the LCD is page-aligned (typically 4KB). If this is
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		defined then the LCD will be aligned to this value instead.
		For ARM it is sometimes useful to use MMU_SECTION_SIZE
		here, since it is cheaper to change data cache settings on
		a per-section basis.


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		CONFIG_LCD_ROTATION

		Sometimes, for example if the display is mounted in portrait
		mode or even if it's mounted landscape but rotated by 180degree,
		we need to rotate our content of the display relative to the
		framebuffer, so that user can read the messages which are
		printed out.
		Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
		initialized with a given rotation from "vl_rot" out of
		"vidinfo_t" which is provided by the board specific code.
		The value for vl_rot is coded as following (matching to
		fbcon=rotate:<n> linux-kernel commandline):
		0 = no rotation respectively 0 degree
		1 = 90 degree rotation
		2 = 180 degree rotation
		3 = 270 degree rotation

		If CONFIG_LCD_ROTATION is not defined, the console will be
		initialized with 0degree rotation.

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		CONFIG_LCD_BMP_RLE8

		Support drawing of RLE8-compressed bitmaps on the LCD.

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		CONFIG_I2C_EDID

		Enables an 'i2c edid' command which can read EDID
		information over I2C from an attached LCD display.

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- Splash Screen Support: CONFIG_SPLASH_SCREEN
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		If this option is set, the environment is checked for
		a variable "splashimage". If found, the usual display
		of logo, copyright and system information on the LCD
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		is suppressed and the BMP image at the address
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		specified in "splashimage" is loaded instead. The
		console is redirected to the "nulldev", too. This
		allows for a "silent" boot where a splash screen is
		loaded very quickly after power-on.
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		CONFIG_SPLASHIMAGE_GUARD

		If this option is set, then U-Boot will prevent the environment
		variable "splashimage" from being set to a problematic address
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		(see doc/README.displaying-bmps).
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		This option is useful for targets where, due to alignment
		restrictions, an improperly aligned BMP image will cause a data
		abort. If you think you will not have problems with unaligned
		accesses (for example because your toolchain prevents them)
		there is no need to set this option.

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		CONFIG_SPLASH_SCREEN_ALIGN

		If this option is set the splash image can be freely positioned
		on the screen. Environment variable "splashpos" specifies the
		position as "x,y". If a positive number is given it is used as
		number of pixel from left/top. If a negative number is given it
		is used as number of pixel from right/bottom. You can also
		specify 'm' for centering the image.

		Example:
		setenv splashpos m,m
			=> image at center of screen

		setenv splashpos 30,20
			=> image at x = 30 and y = 20

		setenv splashpos -10,m
			=> vertically centered image
			   at x = dspWidth - bmpWidth - 9

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- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP

		If this option is set, additionally to standard BMP
		images, gzipped BMP images can be displayed via the
		splashscreen support or the bmp command.

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- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8

		If this option is set, 8-bit RLE compressed BMP images
		can be displayed via the splashscreen support or the
		bmp command.

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- Compression support:
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		CONFIG_GZIP

		Enabled by default to support gzip compressed images.

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		CONFIG_BZIP2

		If this option is set, support for bzip2 compressed
		images is included. If not, only uncompressed and gzip
		compressed images are supported.

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		NOTE: the bzip2 algorithm requires a lot of RAM, so
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		the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
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		be at least 4MB.
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- MII/PHY support:
		CONFIG_PHY_CLOCK_FREQ (ppc4xx)

		The clock frequency of the MII bus

		CONFIG_PHY_RESET_DELAY

		Some PHY like Intel LXT971A need extra delay after
		reset before any MII register access is possible.
		For such PHY, set this option to the usec delay
		required. (minimum 300usec for LXT971A)

		CONFIG_PHY_CMD_DELAY (ppc4xx)

		Some PHY like Intel LXT971A need extra delay after
		command issued before MII status register can be read

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- IP address:
		CONFIG_IPADDR

		Define a default value for the IP address to use for
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		the default Ethernet interface, in case this is not
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		determined through e.g. bootp.
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		(Environment variable "ipaddr")
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- Server IP address:
		CONFIG_SERVERIP

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		Defines a default value for the IP address of a TFTP
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		server to contact when using the "tftboot" command.
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		(Environment variable "serverip")
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		CONFIG_KEEP_SERVERADDR

		Keeps the server's MAC address, in the env 'serveraddr'
		for passing to bootargs (like Linux's netconsole option)

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- Gateway IP address:
		CONFIG_GATEWAYIP

		Defines a default value for the IP address of the
		default router where packets to other networks are
		sent to.
		(Environment variable "gatewayip")

- Subnet mask:
		CONFIG_NETMASK

		Defines a default value for the subnet mask (or
		routing prefix) which is used to determine if an IP
		address belongs to the local subnet or needs to be
		forwarded through a router.
		(Environment variable "netmask")

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- BOOTP Recovery Mode:
		CONFIG_BOOTP_RANDOM_DELAY

		If you have many targets in a network that try to
		boot using BOOTP, you may want to avoid that all
		systems send out BOOTP requests at precisely the same
		moment (which would happen for instance at recovery
		from a power failure, when all systems will try to
		boot, thus flooding the BOOTP server. Defining
		CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
		inserted before sending out BOOTP requests. The
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		following delays are inserted then:
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		1st BOOTP request:	delay 0 ... 1 sec
		2nd BOOTP request:	delay 0 ... 2 sec
		3rd BOOTP request:	delay 0 ... 4 sec
		4th and following
		BOOTP requests:		delay 0 ... 8 sec

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		CONFIG_BOOTP_ID_CACHE_SIZE

		BOOTP packets are uniquely identified using a 32-bit ID. The
		server will copy the ID from client requests to responses and
		U-Boot will use this to determine if it is the destination of
		an incoming response. Some servers will check that addresses
		aren't in use before handing them out (usually using an ARP
		ping) and therefore take up to a few hundred milliseconds to
		respond. Network congestion may also influence the time it
		takes for a response to make it back to the client. If that
		time is too long, U-Boot will retransmit requests. In order
		to allow earlier responses to still be accepted after these
		retransmissions, U-Boot's BOOTP client keeps a small cache of
		IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
		cache. The default is to keep IDs for up to four outstanding
		requests. Increasing this will allow U-Boot to accept offers
		from a BOOTP client in networks with unusually high latency.

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- DHCP Advanced Options:
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		You can fine tune the DHCP functionality by defining
		CONFIG_BOOTP_* symbols:

		CONFIG_BOOTP_NISDOMAIN
		CONFIG_BOOTP_BOOTFILESIZE
		CONFIG_BOOTP_SEND_HOSTNAME
		CONFIG_BOOTP_NTPSERVER
		CONFIG_BOOTP_TIMEOFFSET
		CONFIG_BOOTP_VENDOREX
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		CONFIG_BOOTP_MAY_FAIL
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		CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
		environment variable, not the BOOTP server.
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		CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
		after the configured retry count, the call will fail
		instead of starting over.  This can be used to fail over
		to Link-local IP address configuration if the DHCP server
		is not available.

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		CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
		to do a dynamic update of a DNS server. To do this, they
		need the hostname of the DHCP requester.
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		If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
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		of the "hostname" environment variable is passed as
		option 12 to the DHCP server.
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		CONFIG_BOOTP_DHCP_REQUEST_DELAY

		A 32bit value in microseconds for a delay between
		receiving a "DHCP Offer" and sending the "DHCP Request".
		This fixes a problem with certain DHCP servers that don't
		respond 100% of the time to a "DHCP request". E.g. On an
		AT91RM9200 processor running at 180MHz, this delay needed
		to be *at least* 15,000 usec before a Windows Server 2003
		DHCP server would reply 100% of the time. I recommend at
		least 50,000 usec to be safe. The alternative is to hope
		that one of the retries will be successful but note that
		the DHCP timeout and retry process takes a longer than
		this delay.

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 - Link-local IP address negotiation:
		Negotiate with other link-local clients on the local network
		for an address that doesn't require explicit configuration.
		This is especially useful if a DHCP server cannot be guaranteed
		to exist in all environments that the device must operate.

		See doc/README.link-local for more information.

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 - MAC address from environment variables

		FDT_SEQ_MACADDR_FROM_ENV

		Fix-up device tree with MAC addresses fetched sequentially from
		environment variables. This config work on assumption that
		non-usable ethernet node of device-tree are either not present
		or their status has been marked as "disabled".

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 - CDP Options:
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		CONFIG_CDP_DEVICE_ID
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		The device id used in CDP trigger frames.

		CONFIG_CDP_DEVICE_ID_PREFIX

		A two character string which is prefixed to the MAC address
		of the device.

		CONFIG_CDP_PORT_ID

		A printf format string which contains the ascii name of
		the port. Normally is set to "eth%d" which sets
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		eth0 for the first Ethernet, eth1 for the second etc.
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		CONFIG_CDP_CAPABILITIES

		A 32bit integer which indicates the device capabilities;
		0x00000010 for a normal host which does not forwards.

		CONFIG_CDP_VERSION

		An ascii string containing the version of the software.

		CONFIG_CDP_PLATFORM

		An ascii string containing the name of the platform.

		CONFIG_CDP_TRIGGER

		A 32bit integer sent on the trigger.

		CONFIG_CDP_POWER_CONSUMPTION

		A 16bit integer containing the power consumption of the
		device in .1 of milliwatts.

		CONFIG_CDP_APPLIANCE_VLAN_TYPE

		A byte containing the id of the VLAN.

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- Status LED:	CONFIG_LED_STATUS
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		Several configurations allow to display the current
		status using a LED. For instance, the LED will blink
		fast while running U-Boot code, stop blinking as
		soon as a reply to a BOOTP request was received, and
		start blinking slow once the Linux kernel is running
		(supported by a status LED driver in the Linux
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		kernel). Defining CONFIG_LED_STATUS enables this
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		feature in U-Boot.

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		Additional options:

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		CONFIG_LED_STATUS_GPIO
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		The status LED can be connected to a GPIO pin.
		In such cases, the gpio_led driver can be used as a
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		status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
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		to include the gpio_led driver in the U-Boot binary.

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		CONFIG_GPIO_LED_INVERTED_TABLE
		Some GPIO connected LEDs may have inverted polarity in which
		case the GPIO high value corresponds to LED off state and
		GPIO low value corresponds to LED on state.
		In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
		with a list of GPIO LEDs that have inverted polarity.

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- I2C Support:	CONFIG_SYS_I2C

		This enable the NEW i2c subsystem, and will allow you to use
		i2c commands at the u-boot command line (as long as you set
		CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
		based realtime clock chips or other i2c devices. See
		common/cmd_i2c.c for a description of the command line
		interface.

		ported i2c driver to the new framework:
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		- drivers/i2c/soft_i2c.c:
		  - activate first bus with CONFIG_SYS_I2C_SOFT define
		    CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
		    for defining speed and slave address
		  - activate second bus with I2C_SOFT_DECLARATIONS2 define
		    CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
		    for defining speed and slave address
		  - activate third bus with I2C_SOFT_DECLARATIONS3 define
		    CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
		    for defining speed and slave address
		  - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
		    CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
		    for defining speed and slave address
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		- drivers/i2c/fsl_i2c.c:
		  - activate i2c driver with CONFIG_SYS_I2C_FSL
		    define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
		    offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
		    CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
		    bus.
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		  - If your board supports a second fsl i2c bus, define
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		    CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
		    CONFIG_SYS_FSL_I2C2_SPEED for the speed and
		    CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
		    second bus.

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		- drivers/i2c/tegra_i2c.c:
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		  - activate this driver with CONFIG_SYS_I2C_TEGRA
		  - This driver adds 4 i2c buses with a fix speed from
		    100000 and the slave addr 0!
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		- drivers/i2c/ppc4xx_i2c.c
		  - activate this driver with CONFIG_SYS_I2C_PPC4XX
		  - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
		  - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1

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		- drivers/i2c/i2c_mxc.c
		  - activate this driver with CONFIG_SYS_I2C_MXC
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		  - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
		  - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
		  - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
		  - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
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		  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
		  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
		  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
		  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
		  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
		  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
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		  - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
		  - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
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		If those defines are not set, default value is 100000
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		for speed, and 0 for slave.

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		- drivers/i2c/rcar_i2c.c:
		  - activate this driver with CONFIG_SYS_I2C_RCAR
		  - This driver adds 4 i2c buses

		  - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
		  - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
		  - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
		  - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
		  - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
		  - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
		  - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
		  - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
		  - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses

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		- drivers/i2c/sh_i2c.c:
		  - activate this driver with CONFIG_SYS_I2C_SH
		  - This driver adds from 2 to 5 i2c buses

		  - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
		  - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
		  - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
		  - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
		  - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
		  - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
		  - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
		  - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
		  - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
		  - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
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		  - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
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		- drivers/i2c/omap24xx_i2c.c
		  - activate this driver with CONFIG_SYS_I2C_OMAP24XX
		  - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
		  - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
		  - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
		  - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
		  - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
		  - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
		  - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
		  - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
		  - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
		  - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4

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		- drivers/i2c/s3c24x0_i2c.c:
		  - activate this driver with CONFIG_SYS_I2C_S3C24X0
		  - This driver adds i2c buses (11 for Exynos5250, Exynos5420
		    9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
		    with a fix speed from 100000 and the slave addr 0!

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		- drivers/i2c/ihs_i2c.c
		  - activate this driver with CONFIG_SYS_I2C_IHS
		  - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
		  - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
		  - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
		  - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
		  - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
		  - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
		  - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
		  - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
		  - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
		  - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
		  - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
		  - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
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		  - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
		  - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
		  - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
		  - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
		  - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
		  - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
		  - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
		  - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
		  - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
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		additional defines:

		CONFIG_SYS_NUM_I2C_BUSES
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		Hold the number of i2c buses you want to use.
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		CONFIG_SYS_I2C_DIRECT_BUS
		define this, if you don't use i2c muxes on your hardware.
		if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
		omit this define.

		CONFIG_SYS_I2C_MAX_HOPS
		define how many muxes are maximal consecutively connected
		on one i2c bus. If you not use i2c muxes, omit this
		define.

		CONFIG_SYS_I2C_BUSES
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		hold a list of buses you want to use, only used if
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		CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
		a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
		CONFIG_SYS_NUM_I2C_BUSES = 9:

		 CONFIG_SYS_I2C_BUSES	{{0, {I2C_NULL_HOP}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
					{0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
					{1, {I2C_NULL_HOP}}, \
					{1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
					{1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
					}

		which defines
			bus 0 on adapter 0 without a mux
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			bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
			bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
			bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
			bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
			bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
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			bus 6 on adapter 1 without a mux
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			bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
			bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
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		If you do not have i2c muxes on your board, omit this define.

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- Legacy I2C Support:
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		If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
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		then the following macros need to be defined (examples are
		from include/configs/lwmon.h):
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		I2C_INIT

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		(Optional). Any commands necessary to enable the I2C
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		controller or configure ports.
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		eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |=	PB_SCL)
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		I2C_ACTIVE

		The code necessary to make the I2C data line active
		(driven).  If the data line is open collector, this
		define can be null.

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		eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |=  PB_SDA)

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		I2C_TRISTATE

		The code necessary to make the I2C data line tri-stated
		(inactive).  If the data line is open collector, this
		define can be null.

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		eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)

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		I2C_READ

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		Code that returns true if the I2C data line is high,
		false if it is low.
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		eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)

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		I2C_SDA(bit)

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		If <bit> is true, sets the I2C data line high. If it
		is false, it clears it (low).
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		eg: #define I2C_SDA(bit) \
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			if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
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			else	immr->im_cpm.cp_pbdat &= ~PB_SDA
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		I2C_SCL(bit)

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		If <bit> is true, sets the I2C clock line high. If it
		is false, it clears it (low).
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		eg: #define I2C_SCL(bit) \
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			if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
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			else	immr->im_cpm.cp_pbdat &= ~PB_SCL
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		I2C_DELAY

		This delay is invoked four times per clock cycle so this
		controls the rate of data transfer.  The data rate thus
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		is 1 / (I2C_DELAY * 4). Often defined to be something
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		like:

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		#define I2C_DELAY  udelay(2)
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		CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA

		If your arch supports the generic GPIO framework (asm/gpio.h),
		then you may alternatively define the two GPIOs that are to be
		used as SCL / SDA.  Any of the previous I2C_xxx macros will
		have GPIO-based defaults assigned to them as appropriate.

		You should define these to the GPIO value as given directly to
		the generic GPIO functions.

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		CONFIG_SYS_I2C_INIT_BOARD
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		When a board is reset during an i2c bus transfer
		chips might think that the current transfer is still
		in progress. On some boards it is possible to access
		the i2c SCLK line directly, either by using the
		processor pin as a GPIO or by having a second pin
		connected to the bus. If this option is defined a
		custom i2c_init_board() routine in boards/xxx/board.c
		is run early in the boot sequence.
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		CONFIG_I2C_MULTI_BUS

		This option allows the use of multiple I2C buses, each of which
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		must have a controller.	 At any point in time, only one bus is
		active.	 To switch to a different bus, use the 'i2c dev' command.
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		Note that bus numbering is zero-based.

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		CONFIG_SYS_I2C_NOPROBES
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		This option specifies a list of I2C devices that will be skipped
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		when the 'i2c probe' command is issued.	 If CONFIG_I2C_MULTI_BUS
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		is set, specify a list of bus-device pairs.  Otherwise, specify
		a 1D array of device addresses
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		e.g.
			#undef	CONFIG_I2C_MULTI_BUS
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			#define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
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		will skip addresses 0x50 and 0x68 on a board with one I2C bus

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			#define CONFIG_I2C_MULTI_BUS
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			#define CONFIG_SYS_I2C_NOPROBES	{{0,0x50},{0,0x68},{1,0x54}}
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		will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1

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		CONFIG_SYS_SPD_BUS_NUM
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		If defined, then this indicates the I2C bus number for DDR SPD.
		If not defined, then U-Boot