Commit 0ca4d40c authored by Jagan Teki's avatar Jagan Teki

ARM: dts: sun8i: Update A83T dts(i) files from Linux-v4.18-rc3

Update all A83T devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 221cb9fd2ee3042689fe0e6613d0f34eb46a5af6
Author: Mylène Josserand <mylene.josserand@bootlin.com>
Date:   Fri May 4 21:05:44 2018 +0200

    ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC

Note: bananapi-m3 and cubietruck-plus board dts files has
usb_otg enabled in U-Boot which were not present in Linux.
Signed-off-by: Jagan Teki's avatarJagan Teki <jagan@amarulasolutions.com>
parent cf682257
/*
* Copyright 2017 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/* AXP813/818 Integrated Power Management Chip */
&axp81x {
interrupt-controller;
#interrupt-cells = <1>;
axp_adc: adc {
compatible = "x-powers,axp813-adc";
#io-channel-cells = <1>;
};
axp_gpio: gpio {
compatible = "x-powers,axp813-gpio";
gpio-controller;
#gpio-cells = <2>;
gpio0_ldo: gpio0-ldo {
pins = "GPIO0";
function = "ldo";
};
gpio1_ldo: gpio1-ldo {
pins = "GPIO1";
function = "ldo";
};
};
battery_power_supply: battery-power-supply {
compatible = "x-powers,axp813-battery-power-supply";
status = "disabled";
};
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <3000>;
reg_dcdc1: dcdc1 {
};
reg_dcdc2: dcdc2 {
};
reg_dcdc3: dcdc3 {
};
reg_dcdc4: dcdc4 {
};
reg_dcdc5: dcdc5 {
};
reg_dcdc6: dcdc6 {
};
reg_dcdc7: dcdc7 {
};
reg_aldo1: aldo1 {
};
reg_aldo2: aldo2 {
};
reg_aldo3: aldo3 {
};
reg_dldo1: dldo1 {
};
reg_dldo2: dldo2 {
};
reg_dldo3: dldo3 {
};
reg_dldo4: dldo4 {
};
reg_eldo1: eldo1 {
};
reg_eldo2: eldo2 {
};
reg_eldo3: eldo3 {
};
reg_fldo1: fldo1 {
};
reg_fldo2: fldo2 {
};
reg_fldo3: fldo3 {
};
reg_ldo_io0: ldo-io0 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_ldo>;
/* Disable by default to avoid conflicts with GPIO */
status = "disabled";
};
reg_ldo_io1: ldo-io1 {
pinctrl-names = "default";
pinctrl-0 = <&gpio1_ldo>;
/* Disable by default to avoid conflicts with GPIO */
status = "disabled";
};
reg_rtc_ldo: rtc-ldo {
/* RTC_LDO is a fixed, always-on regulator */
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_sw: sw {
};
reg_drivevbus: drivevbus {
status = "disabled";
};
};
};
......@@ -44,6 +44,8 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Allwinner A83T H8Homlet Proto Dev Board v2.0";
compatible = "allwinner,h8homlet-v2", "allwinner,sun8i-a83t";
......@@ -55,22 +57,213 @@
chosen {
stdout-path = "serial0:115200n8";
};
reg_usb0_vbus: reg-usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
};
reg_usb1_vbus: reg-usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
};
};
&ehci0 {
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
bus-width = <4>;
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_emmc_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci0 {
status = "okay";
};
&r_rsb {
status = "okay";
axp81x: pmic@3a3 {
compatible = "x-powers,axp818", "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
eldoin-supply = <&reg_dcdc1>;
swin-supply = <&reg_dcdc1>;
};
ac100: codec@e89 {
compatible = "x-powers,ac100";
reg = <0xe89>;
ac100_codec: codec {
compatible = "x-powers,ac100-codec";
interrupt-parent = <&r_pio>;
interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
#clock-cells = <0>;
clock-output-names = "4M_adda";
};
ac100_rtc: rtc {
compatible = "x-powers,ac100-rtc";
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
clocks = <&ac100_codec>;
#clock-cells = <1>;
clock-output-names = "cko1_rtc",
"cko2_rtc",
"cko3_rtc";
};
};
};
#include "axp81x.dtsi"
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-1v8";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dram-pll";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpua";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
&reg_dcdc4 {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-gpu";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdd-sys";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-mipi";
};
&reg_dldo4 {
/*
* The PHY requires 20ms after all voltages are applied until core
* logic is ready and 30ms after the reset pin is de-asserted.
* Set a 100ms delay to account for PMIC ramp time and board traces.
*/
regulator-enable-ramp-delay = <100000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-ephy";
};
&reg_fldo1 {
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd12-hsic";
};
&reg_fldo2 {
/*
* Despite the embedded CPUs core not being used in any way,
* this must remain on or the system will hang.
*/
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&reg_sw {
regulator-name = "vcc-wifi";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usbphy {
usb0_vbus-supply = <&reg_usb0_vbus>;
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
&usb_otg {
dr_mode = "host";
status = "okay";
};
/*
* Copyright 2015 Vishnu Patekar
* Vishnu Patekar <vishnupatekar0510@gmail.com>
* Copyright 2017 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
......@@ -44,29 +45,316 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Allwinner A83T BananaPi M3 Board v1.2";
compatible = "bananapi,m3v1.2", "allwinner,sun8i-a83t";
model = "Banana Pi BPI-M3";
compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
aliases {
ethernet0 = &emac;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
blue {
label = "bananapi-m3:blue:usr";
gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
};
green {
label = "bananapi-m3:green:usr";
gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
};
};
reg_usb1_vbus: reg-usb1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
enable-active-high;
gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";
/* The WiFi low power clock must be 32768 Hz */
assigned-clocks = <&ac100_rtc 1>;
assigned-clock-rates = <32768>;
/* enables internal regulator and de-asserts reset */
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
};
};
&de {
status = "okay";
};
&ehci0 {
/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
status = "okay";
/* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_sw>;
phy-handle = <&rgmii_phy>;
phy-mode = "rgmii";
allwinner,rx-delay-ps = <700>;
allwinner,tx-delay-ps = <700>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&mdio {
rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_dldo1>;
vqmmc-supply = <&reg_dldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&r_pio>;
interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_emmc_pins>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&r_rsb {
status = "okay";
axp81x: pmic@3a3 {
compatible = "x-powers,axp813";
reg = <0x3a3>;
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
eldoin-supply = <&reg_dcdc1>;
fldoin-supply = <&reg_dcdc5>;
swin-supply = <&reg_dcdc1>;
x-powers,drive-vbus-en;
};
ac100: codec@e89 {
compatible = "x-powers,ac100";
reg = <0xe89>;
ac100_codec: codec {
compatible = "x-powers,ac100-codec";
interrupt-parent = <&r_pio>;
interrupts = <0 11 IRQ_TYPE_LEVEL_LOW>; /* PL11 */
#clock-cells = <0>;
clock-output-names = "4M_adda";
};
ac100_rtc: rtc {
compatible = "x-powers,ac100-rtc";
interrupt-parent = <&r_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
clocks = <&ac100_codec>;
#clock-cells = <1>;
clock-output-names = "cko1_rtc",
"cko2_rtc",
"cko3_rtc";
};
};
};
#include "axp81x.dtsi"
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-1v8";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "dram-pll";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_dcdc1 {
/* schematics says 3.1V but FEX file says 3.3V */
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpua";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpub";
};
&reg_dcdc4 {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-gpu";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vcc-dram";
};
&reg_dcdc6 {
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdd-sys";
};
&reg_dldo1 {
/*
* This powers both the WiFi/BT module's main power, I/O supply,
* and external pull-ups on all the data lines. It should be set
* to the same voltage as the I/O supply (DCDC1 in this case) to
* avoid any leakage or mismatch.
*/
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&reg_dldo3 {
regulator-always-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-pd";
};
&reg_drivevbus {
regulator-name = "usb0-vbus";
status = "okay";
};
&reg_fldo1 {
regulator-min-microvolt = <1080000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd12-hsic";
};
&reg_fldo2 {
/*
* Despite the embedded CPUs core not being used in any way,
* this must remain on or the system will hang.
*/
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpus";
};
&reg_rtc_ldo {
regulator-name = "vcc-rtc";
};
&reg_sw {
/*
* The PHY requires 20ms after all voltages
* are applied until core logic is ready and
* 30ms after the reset pin is de-asserted.
* Set a 100ms delay to account for PMIC
* ramp time and board traces.
*/
regulator-enable-ramp-delay = <100000>;
regulator-name = "vcc-ephy";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usb_otg {
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
......@@ -45,33 +45,353 @@
/dts-v1/;
#include "sun8i-a83t.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Cubietech Cubietruck Plus";
compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
aliases {