Commit b30c4190 authored by Stefan Mavrodiev's avatar Stefan Mavrodiev Committed by Jagan Teki

Move CONFIG_PHY_ADDR to Kconfig

CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.
Signed-off-by: default avatarStefan Mavrodiev <stefan@olimex.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki's avatarJagan Teki <jagan@amarulasolutions.com>
Reviewed-by: default avatarJagan Teki <jagan@openedev.com>
parent 2d53018a
......@@ -1420,10 +1420,6 @@ The following options need to be configured:
be at least 4MB.
- MII/PHY support:
CONFIG_PHY_ADDR
The address of PHY on MII bus.
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
......
......@@ -36,6 +36,7 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR=31
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
CONFIG_LPC32XX_SSP=y
......
......@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
......
......@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
......
......@@ -20,6 +20,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
CONFIG_PHY_ADDR=8
CONFIG_PHY_MESON_GXL=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
......
......@@ -13,6 +13,13 @@ menuconfig PHYLIB
if PHYLIB
config PHY_ADDR
int "PHY address"
default 1 if ARCH_SUNXI
default 0
help
The address of PHY on MII bus. Usually in range of 0 to 31.
config B53_SWITCH
bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
help
......
......@@ -258,7 +258,6 @@
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
/* I2C configuration */
......
......@@ -282,7 +282,6 @@
#endif
/* Network. */
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_SMSC
#define CONFIG_MII
#define CONFIG_PHY_ATHEROS
......
......@@ -71,7 +71,6 @@
#define CONFIG_RMII
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
#define CONFIG_PHY_ADDR 0x1F
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/*
......
......@@ -40,7 +40,6 @@
#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
#define CONFIG_PHY_MARVELL /* there is a marvell phy */
#define CONFIG_PHY_ADDR { 0x1, 0x0 }
#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
#define CONFIG_SYS_ALT_MEMTEST
......
......@@ -95,7 +95,6 @@
#define CONFIG_DRIVER_EP93XX_MAC
#define CONFIG_MII_SUPPRESS_PREAMBLE
#define CONFIG_MII
#define CONFIG_PHY_ADDR 1
#undef CONFIG_NETCONSOLE
/* SDRAM configuration */
......
......@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-khadas-vim.dtb\0"
#include <configs/meson-gxbb-common.h>
......
......@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
#define MESON_FDTFILE_SETTING "fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb\0"
#include <configs/meson-gxbb-common.h>
......
......@@ -12,8 +12,6 @@
#define CONFIG_MISC_INIT_R
#define CONFIG_PHY_ADDR 8
/* Serial setup */
#define CONFIG_CONS_INDEX 0
......
......@@ -77,7 +77,6 @@
#define CONFIG_SYS_NS16550_COM1 0x44e09000
/* Ethernet support */
#define CONFIG_PHY_ADDR 0
#define CONFIG_PHY_RESET_DELAY 1000
/* SPL */
......
......@@ -288,12 +288,10 @@ extern int soft_i2c_gpio_scl;
/* Ethernet support */
#ifdef CONFIG_SUN4I_EMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#endif
#ifdef CONFIG_SUN7I_GMAC
#define CONFIG_PHY_ADDR 1
#define CONFIG_MII /* MII PHY management */
#define CONFIG_PHY_REALTEK
#endif
......
......@@ -56,7 +56,6 @@
#define CONFIG_PHY_SMSC
#define CONFIG_LPC32XX_ETH
#define CONFIG_PHY_ADDR 0
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
......
......@@ -70,7 +70,6 @@
/* Ethernet config options */
#define CONFIG_MII
#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_SPEAR_GPIO
......
......@@ -1541,7 +1541,6 @@ CONFIG_PERIF2_FREQ
CONFIG_PERIF3_FREQ
CONFIG_PERIF4_FREQ
CONFIG_PHYSMEM
CONFIG_PHY_ADDR
CONFIG_PHY_BASE_ADR
CONFIG_PHY_BCM5421S
CONFIG_PHY_ET1011C_TX_CLK_FIX
......
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