Commit b5867b1a authored by Angelo Dureghello's avatar Angelo Dureghello Committed by Tom Rini

m68k: add basic set of devicetrees

This patch adds a basic group of devicetrees, one for each
cpu family, including actually just uart and dspi devices,
since these are the drivers supporting devicetree (support
added in this patch-set).
Acked-by: Jagan Teki's avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Angelo Dureghello's avatarAngelo Dureghello <angelo@sysam.it>
Reviewed-by: Jagan Teki's avatarJagan Teki <jagan@amarulasolutions.com>
parent 40920bde
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5208";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5227x";
aliases {
serial0 = &uart0;
spi0 = &dspi0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
dspi0: dspi@fc05c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc05c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf523x";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ipsbar: ipsbar@4000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
uart1: uart@240 {
compatible = "fsl,mcf-uart";
reg = <0x240 0x40>;
status = "disabled";
};
uart2: uart@280 {
compatible = "fsl,mcf-uart";
reg = <0x280 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5249";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
mbar: mbar@10000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x10000000 0x10000>;
reg = <0x10000000 0x10000>;
uart0: uart@1c0 {
compatible = "fsl,mcf-uart";
reg = <0x1c0 0x40>;
status = "disabled";
};
uart1: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5253";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
mbar: mbar@10000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x10000000 0x10000>;
reg = <0x10000000 0x10000>;
uart0: uart@1c0 {
compatible = "fsl,mcf-uart";
reg = <0x1c0 0x40>;
status = "disabled";
};
uart1: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
uart3: uart@c00 {
compatible = "fsl,mcf-uart";
reg = <0xc00 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5271";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ipsbar: ipsbar@4000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
uart1: uart@240 {
compatible = "fsl,mcf-uart";
reg = <0x240 0x40>;
status = "disabled";
};
uart2: uart@280 {
compatible = "fsl,mcf-uart";
reg = <0x280 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5272";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
mbar: mbar@10000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x10000000 0x10000>;
reg = <0x10000000 0x10000>;
uart0: uart@100 {
compatible = "fsl,mcf-uart";
reg = <0x100 0x40>;
status = "disabled";
};
uart1: uart@140 {
compatible = "fsl,mcf-uart";
reg = <0x140 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5275";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ipsbar: ipsbar@4000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
uart1: uart@240 {
compatible = "fsl,mcf-uart";
reg = <0x240 0x40>;
status = "disabled";
};
uart2: uart@280 {
compatible = "fsl,mcf-uart";
reg = <0x280 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5282";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ipsbar: ipsbar@4000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x40000000 0x40000000>;
reg = <0x40000000 0x40000000>;
uart0: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
uart1: uart@240 {
compatible = "fsl,mcf-uart";
reg = <0x240 0x40>;
status = "disabled";
};
uart2: uart@280 {
compatible = "fsl,mcf-uart";
reg = <0x280 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5301x";
aliases {
serial0 = &uart0;
spi0 = &dspi0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
dspi0: dspi@fc05c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc05c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5307";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
/* MBAR */
mbar: mbar@10000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x10000000 0x10000>;
reg = <0x10000000 0x10000>;
uart0: uart@1c0 {
compatible = "fsl,mcf-uart";
reg = <0x1c0 0x40>;
status = "disabled";
};
uart1: uart@200 {
compatible = "fsl,mcf-uart";
reg = <0x200 0x40>;
status = "disabled";
};
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5329";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5329";
aliases {
serial0 = &uart0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5441x";
aliases {
serial0 = &uart0;
spi0 = &dspi0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
uart3: uart@fc06c000 {
compatible = "fsl,mcf-uart";
reg = <0xfc06c000 0x40>;
status = "disabled";
};
dspi0: dspi@fc05c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc05c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
dspi1: dspi@fc03c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc03c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
dspi2: dspi@ec038000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xec038000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
dspi3: dspi@ec03c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xec03c00 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf5445x";
aliases {
serial0 = &uart0;
spi0 = &dspi0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
uart1: uart@fc064000 {
compatible = "fsl,mcf-uart";
reg = <0xfc064000 0x40>;
status = "disabled";
};
uart2: uart@fc068000 {
compatible = "fsl,mcf-uart";
reg = <0xfc068000 0x40>;
status = "disabled";
};
dspi0: dspi@fc05c000 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfc05c000 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
};
};
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
*/
/ {
compatible = "fsl,mcf54x5";
aliases {
/* TO DO, clarify on serial, this SoC seems to have SPC and
* no UARTS.
*/
spi0 = &dspi0;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
mbar: mbar@80000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00000000 0x80000000 0x10000>;
reg = <0x80000000 0x10000>;
dspi0: dspi@8a00 {
compatible = "fsl,mcf-dspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x8a00 0x100>;
spi-max-frequency = <50000000>;
num-cs = <4>;
spi-mode = <0>;
status = "disabled";
};
};
};
};
Freescale ColdFire UART
Required properties:
- compatible : should be "fsl,mcf-uart"
- reg: start address and size of the registers
Example:
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
uart0: uart@fc060000 {
compatible = "fsl,mcf-uart";
reg = <0xfc060000 0x40>;
status = "disabled";
};
};
Freescale ColdFire DSPI controller
Required properties:
- compatible : "fsl,mcf-dspi"
- #address-cells: <1>, as required by generic SPI binding
- #size-cells: <0>, also as required by generic SPI binding
- reg : offset and length of the register set for the device
Optional properties:
- spi-max-frequency : max supported spi frequency
- num-cs : the number of the chipselect signals
- spi-mode: spi motorola mode, 0 to 3