- 16 Jul, 2018 6 commits
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Andre Przywara authored
When the defconfig for the SoPine baseboard was added, there wasn't any proper DT for the board yet, so we used the Pine64 DT as a placeholder. Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use them in our defconfig. This is as of v4.18-rc3, exactly Linux commit: commit 7d556bfc49adddf2beb0d16c91945c3b8b783282 Author: Jagan Teki <jagannadh.teki@gmail.com> Date: Mon Dec 4 10:23:07 2017 +0530 arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3 Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Update the .dts file for the various boards with an Allwinner H3 SoC. This is as of v4.18-rc3, exactly Linux commit: commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD) Merge: 7c00e8ae041b 87815dda5593 Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Mon Jun 11 17:57:38 2018 -0700 Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc This also includes the OrangePi Zero .dts, which technically has an Allwinner H2+ SoC. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Update the .dts file for the various boards with an Allwinner H5 SoC. This is as of v4.18-rc3, exactly Linux commit: commit af5d05bdc99c211729cba0a3d5417bccfa308caf Author: Neil Armstrong <narmstrong@baylibre.com> Date: Tue Apr 24 13:47:14 2018 +0200 arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Update the device tree files from the Linux tree as of v4.18-rc3, exactly Linux commit: commit 55c5ba5e49a0a124ed416880e8227b493474495e Author: Chen-Yu Tsai <wens@csie.org> Date: Tue Apr 24 19:34:22 2018 +0800 arm64: dts: allwinner: h5: Add cpu0 label for first cpu Since the H3 and H5 are very similar (aside from the actual ARM cores), they share most the SoC .dtsi and thus have to be updated together. One tiny change is the removal of the "arm/" prefix from the include path in the sun50i-h5.dtsi, which is needed because we don't share the same sophisticated DT directory layout of Linux. Also we need to fix up the board .dts files already, since the .dtsi removes some pins, so the .dts can't reference them anymore. This is to maintain bisectability. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Update the .dts files for the various boards with an Allwinner A64 SoC. This is as of v4.18-rc3, exactly Linux commit: commit 818668055c9d588c9a9d151e3b258ed1adacba0b Author: Jagan Teki <jagan@amarulasolutions.com> Date: Mon Apr 23 12:02:39 2018 +0530 arm64: dts: allwinner: a64: bananapi-m64: add usb otg It updates the existing DT files, adds the newly added axp803.dtsi and removes our temporary kludge file to get Ethernet support in U-Boot. I left the amarula-relic alone, as this DT has not reached mainline yet. The changes are not critical anyway, and the next sync will fix this. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com> Tested-by:
Jagan Teki <jagan@amarulasolutions.com>
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Andre Przywara authored
Updates the device tree file from the the Linux tree as of v4.18-rc3, exactly Linux commit: commit c1cff65f9b16b31e731e2e75bbe06638c86e1996 Author: Harald Geyer <harald@ccbib.org> Date: Thu Mar 15 16:25:08 2018 +0000 arm64: dts: allwinner: a64: add simplefb for A64 SoC This also pulls in the newly required include files for the clock and reset bindings, also removes the now redundant part from our *-u-boot.dtsi overlay file. I kept the PWM node from U-Boot, as we recently gained this explicitly for U-Boot's own usage and I don't want to regress here. This node is in the queue for mainline Linux already, so the next sync will make it all equal again. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Maxime Ripard <maxime.ripard@bootlin.com> Acked-by:
Jagan Teki <jagan@amarulasolutions.com> Tested-by:
Jagan Teki <jagan@amarulasolutions.com>
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- 13 Jul, 2018 2 commits
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Ley Foon Tan authored
CONFIG_SPL_RESET_SUPPORT has been renamed to CONFIG_SPL_DM_RESET, update this Kconfig file. Fixes: bfc6bae8 ("reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET") Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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git://git.denx.de/u-boot-socfpgaTom Rini authored
- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c Signed-off-by:
Tom Rini <trini@konsulko.com>
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- 12 Jul, 2018 31 commits
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git://git.denx.de/u-boot-i2cTom Rini authored
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Ley Foon Tan authored
Fix compilation warning when enable CONFIG_DEBUG_UART. arch/arm/mach-socfpga/spl_s10.c: In function ‘board_init_f’: arch/arm/mach-socfpga/spl_s10.c:146:2: warning: implicit declaration of function ‘debug_uart_init’; did you mean ‘part_init’? [-Wimplicit-function-declaration] debug_uart_init(); Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
MCR instruction only available in ARM 32-bit. So, compile MCR instruction when ARM 32-bit is enabled. Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Commit 5dfd5607af2114047bd ("ARM: socfpga: Pull DRAM size from DT") get memory size from DT. So, we need to update memory size in memory node. Otherwise, it cause U-boot hang. Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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git://git.denx.de/u-boot-ubiTom Rini authored
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Ye Li authored
When doing "i2c dev 4; i2c probe" with ENET daughter card connected on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of lpi2c always show busy, but the master is idle, and stop is detected (SDF set). This patch addes a handling to re-init the lpi2c master for this case. Then the issue can be worked around. Signed-off-by:
Ye Li <ye.li@nxp.com> Acked-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Ye Li authored
In xfer function, both bus_i2c_read and bus_i2c_write will send a STOP command. This causes a problem when reading register data from i2c device. Generally two operations comprise the register data reading: 1. Write the register address to i2c device. START | chip_addr | W | ACK | register_addr | ACK | 2. Read the Data from i2c device. START | chip_addr | R | ACK | DATA | NACK | STOP The STOP command should happen at the end of the transfer, otherwise we will always get data from register address 0 Signed-off-by:
Ye Li <ye.li@nxp.com> Acked-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Gao Pan authored
For LPI2C IP, NACK is detected by the rising edge of the ninth clock. In current uboot driver, once NACK is detected, it will reset and then disable LPI2C master. As a result, we can never see the falling edge of the ninth clock. Signed-off-by:
Gao Pan <pandy.gao@nxp.com> Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Ye Li authored
Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory to u-boot include directory as a common header file. Signed-off-by:
Ye Li <ye.li@nxp.com> Signed-off-by:
Peng Fan <peng.fan@nxp.com> Reviewed-by:
Heiko Schocher <hs@denx.de>
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Marek Vasut authored
Make sure the ARM ACTLR register has correct configuration, otherwise the Linux kernel refuses to boot. In particular, the "Write Full Line of Zeroes" bit must be cleared. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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Marek Vasut authored
The SPL can also parse the DRAM configuration node to figure out the memory layout, make sure it is available. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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Marek Vasut authored
Pull the DRAM size from DT instead of hardcoding it into U-Boot. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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Marek Vasut authored
The SDRAM must first be rewritten by zeroes if ECC is used to initialize the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a case. This scrubbing implementation turns the caches on temporarily, then overwrites the whole RAM with zeroes, flushes the caches and turns them off again. This provides satisfactory performance. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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Marek Vasut authored
This function was never used in SPL and the default implementation of dram_bank_mmu_setup() does the same thing. The only difference is the part which configures OCRAM as cachable, which doesn't really work as it covers more than the OCRAM. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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Ley Foon Tan authored
Add do_bridge_reset() function for Arria 10, it is required by misc.c. arch/arm/mach-socfpga/built-in.o: In function `do_bridge': arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset' make[1]: *** [u-boot] Error 1 Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Add build support for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Conflicts: arch/arm/Kconfig arch/arm/mach-socfpga/Kconfig
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Ley Foon Tan authored
Add socdk board support for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Add DDR support for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Add timer support for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by:
Marek Vasut <marex@denx.de>
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Ley Foon Tan authored
Add SPL driver support for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Restructure the SPL so each devices such as CV, A10 and S10 will have their own dedicated SPL file. SPL file determine the HW initialization flow which is device specific Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Add MMU memory mapping table for Stratix SoC. Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Acked-by:
Marek Vasut <marex@denx.de>
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Ley Foon Tan authored
Add mailbox support for Stratix SoC Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Reviewed-by:
Marek Vasut <marex@denx.de>
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Ley Foon Tan authored
Add misc support such as EMAC and cpu info printout for Stratix SoC Signed-off-by:
Chin Liang See <chin.liang.see@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Move bridge command to misc common driver, in preparation to used by other platforms. Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
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Ley Foon Tan authored
Use "%p" to print cmdbuf. Compilation warning as below: CC spl/drivers/spi/cadence_qspi_apb.o LD spl/lib/built-in.o drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’: drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] cmdlen, (unsigned int)cmdbuf); Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Acked-by:
Marek Vasut <marex@denx.de>
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Ley Foon Tan authored
Use "%zu" for size_t data type. Compilation warning as below: In file included from include/linux/bug.h:7:0, from include/common.h:26, from drivers/spi/cadence_qspi.c:8: drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’: drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=] debug("%s: len=%d [bytes]\n", __func__, data_bytes); ^ include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’ #define pr_fmt(fmt) fmt ^~~ include/log.h:142:2: note: in expansion of macro ‘debug_cond’ debug_cond(_DEBUG, fmt, ##args) ^~~~~~~~~~ drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’ debug("%s: len=%d [bytes]\n", __func__, data_bytes); Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com> Acked-by:
Marek Vasut <marex@denx.de>
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Christophe Kerello authored
By checking ubifs source code, s_instances parameter is not used anymore. So, set this parameter and the associated source code under __UBOOT__ compilation. Signed-off-by:
Christophe Kerello <christophe.kerello@st.com> Signed-off-by:
Patrice Chotard <patrice.chotard@st.com>
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Stefan Roese authored
When trying to attach an UBI MTD partition via "ubi part", it may happen that the MTD partition defined in U-Boot (via mtdparts) is not big enough than the one, where the UBI device has been created on. This may lead to errors, which are not really descriptive to debug and solve this issue, like: ubi0 error: vtbl_check: too large reserved_pebs 1982, good PEBs 1020 ubi0 error: vtbl_check: volume table check failed: record 0, error 9 or: ubi0 error: init_volumes: not enough PEBs, required 1738, available 1020 ubi0 error: ubi_wl_init: no enough physical eraseblocks (-718, need 1) ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -12 Lets add an additional message upon attach failure, to aid the U-Boot user to solve this problem. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de>
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Stefan Agner authored
When using static volumes, the file size stored in the volume is determined at runtime. Currently the ubi command prints the file size specified on the console, which leads to a rather confusing series of messages: # ubi read ${fdt_addr_r} testvol Read 0 bytes from volume testvol to 82000000 No size specified -> Using max size (179924992) Make sure to print the actual size read in any case: # ubi read ${fdt_addr_r} testvol No size specified -> Using max size (179924992) Read 179924992 bytes from volume testvol to 82000000 Signed-off-by:
Stefan Agner <stefan.agner@toradex.com>
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git://git.denx.de/u-boot-mipsTom Rini authored
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- 11 Jul, 2018 1 commit
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git://git.denx.de/u-boot-dmTom Rini authored
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